[src/trunk]: src/sys/dev/pci 57765 series is not based on 5717 series. 5717 s...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ebc2f66dd933
branches:  trunk
changeset: 787845:ebc2f66dd933
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon Jul 08 05:24:34 2013 +0000

description:
57765 series is not based on 5717 series. 5717 series is based on 57765
series.

diffstat:

 sys/dev/pci/if_bge.c    |  42 +++++++++++++++++++++---------------------
 sys/dev/pci/if_bgereg.h |   9 +++++----
 2 files changed, 26 insertions(+), 25 deletions(-)

diffs (156 lines):

diff -r d485dd14e278 -r ebc2f66dd933 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Mon Jul 08 04:31:12 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Mon Jul 08 05:24:34 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.256 2013/07/05 07:08:26 msaitoh Exp $     */
+/*     $NetBSD: if_bge.c,v 1.257 2013/07/08 05:24:34 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.256 2013/07/05 07:08:26 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.257 2013/07/08 05:24:34 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -677,8 +677,9 @@
 #define BGE_IS_5714_FAMILY(sc)         ((sc)->bge_flags & BGE_5714_FAMILY)
 #define BGE_IS_575X_PLUS(sc)           ((sc)->bge_flags & BGE_575X_PLUS)
 #define BGE_IS_5755_PLUS(sc)           ((sc)->bge_flags & BGE_5755_PLUS)
+#define BGE_IS_57765_FAMILY(sc)                ((sc)->bge_flags & BGE_57765_FAMILY)
+#define BGE_IS_57765_PLUS(sc)          ((sc)->bge_flags & BGE_57765_PLUS)
 #define BGE_IS_5717_PLUS(sc)           ((sc)->bge_flags & BGE_5717_PLUS)
-#define BGE_IS_57765_PLUS(sc)          ((sc)->bge_flags & BGE_57765_PLUS)
 
 static const struct bge_revision {
        uint32_t                br_chipid;
@@ -2285,8 +2286,7 @@
                CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
        }
        
-       /* XXX Should we use 57765_FAMILY? */
-       if (BGE_IS_57765_PLUS(sc)) {
+       if (BGE_IS_57765_FAMILY(sc)) {
                if (sc->bge_chipid == BGE_CHIPID_BCM57765_A0) {
                        /* Save */
                        mode_ctl = CSR_READ_4(sc, BGE_MODE_CTL);
@@ -2403,7 +2403,7 @@
            BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
                dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA;
 
-       if (BGE_IS_5717_PLUS(sc)) {
+       if (BGE_IS_57765_PLUS(sc)) {
                dma_rw_ctl &= ~BGE_PCIDMARWCTL_DIS_CACHE_ALIGNMENT;
                if (sc->bge_chipid == BGE_CHIPID_BCM57765_A0)
                        dma_rw_ctl &= ~BGE_PCIDMARWCTL_CRDRDR_RDMA_MRRS_MSK;
@@ -2413,8 +2413,8 @@
                 * a status tag update and leave interrupts permanently
                 * disabled.
                 */
-               if (BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
-                   BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57765)
+               if (!BGE_IS_57765_FAMILY(sc) &&
+                   BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717)
                        dma_rw_ctl |= BGE_PCIDMARWCTL_TAGGED_STATUS_WA;
        }
 
@@ -2635,7 +2635,7 @@
        rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb;
        BGE_HOSTADDR(rcb->bge_hostaddr, BGE_RING_DMA_ADDR(sc, bge_rx_std_ring));
        /* 5718 step 16 */
-       if (BGE_IS_5717_PLUS(sc)) {
+       if (BGE_IS_57765_PLUS(sc)) {
                /*
                 * Bits 31-16: Programmable ring size (2048, 1024, 512, .., 32)
                 * Bits 15-2 : Maximum RX frame size
@@ -2801,15 +2801,13 @@
         * 'ring diabled' bit in the flags field of all the receive
         * return ring control blocks, located in NIC memory.
         */
-       if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
-           BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5719 ||
-           BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720) {
+       if (BGE_IS_5717_PLUS(sc)) {
                /* Should be 17, use 16 until we get an SRAM map. */
                limit = 16;
        } else if (BGE_IS_5700_FAMILY(sc))
                limit = BGE_RX_RINGS_MAX;
        else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
-           BGE_IS_57765_PLUS(sc))
+           BGE_IS_57765_FAMILY(sc))
                limit = 4;
        else
                limit = 1;
@@ -3043,7 +3041,7 @@
            BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 ||
            BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 ||
            BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780 ||
-           BGE_IS_5717_PLUS(sc)) { /* XXX 57765? */
+           BGE_IS_57765_PLUS(sc)) {
                dmactl = CSR_READ_4(sc, BGE_RDMA_RSRVCTRL);
                /*
                 * Adjust tx margin to prevent TX data corruption and
@@ -3398,14 +3396,16 @@
 
        /* Save chipset family. */
        switch (BGE_ASICREV(sc->bge_chipid)) {
-       case BGE_ASICREV_BCM57765:
-       case BGE_ASICREV_BCM57766:
-               sc->bge_flags |= BGE_57765_PLUS;
-               /* FALLTHROUGH */
        case BGE_ASICREV_BCM5717:
        case BGE_ASICREV_BCM5719:
        case BGE_ASICREV_BCM5720:
-               sc->bge_flags |= BGE_5717_PLUS | BGE_5755_PLUS |
+               sc->bge_flags |= BGE_5717_PLUS;
+               /* FALLTHROUGH */
+       case BGE_ASICREV_BCM57765:
+       case BGE_ASICREV_BCM57766:
+               if (!BGE_IS_5717_PLUS(sc))
+                       sc->bge_flags |= BGE_57765_FAMILY;
+               sc->bge_flags |= BGE_57765_PLUS | BGE_5755_PLUS |
                    BGE_575X_PLUS | BGE_5705_PLUS | BGE_JUMBO_CAPABLE;
                /* Jumbo frame on BCM5719 A0 does not work. */
                if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5719) &&
@@ -3577,7 +3577,7 @@
            BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5906 &&
            BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785 &&
            BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57780 &&
-           !BGE_IS_5717_PLUS(sc)) {
+           !BGE_IS_57765_PLUS(sc)) {
                if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
                    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 ||
                    BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 ||
@@ -4394,7 +4394,7 @@
 bge_rxcsum(struct bge_softc *sc, struct bge_rx_bd *cur_rx, struct mbuf *m)
 {
 
-       if (BGE_IS_5717_PLUS(sc)) {
+       if (BGE_IS_57765_PLUS(sc)) {
                if ((cur_rx->bge_flags & BGE_RXBDFLAG_IPV6) == 0) {
                        if ((cur_rx->bge_flags & BGE_RXBDFLAG_IP_CSUM) != 0)
                                m->m_pkthdr.csum_flags = M_CSUM_IPv4;
diff -r d485dd14e278 -r ebc2f66dd933 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h   Mon Jul 08 04:31:12 2013 +0000
+++ b/sys/dev/pci/if_bgereg.h   Mon Jul 08 05:24:34 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bgereg.h,v 1.81 2013/05/31 17:15:19 msaitoh Exp $   */
+/*     $NetBSD: if_bgereg.h,v 1.82 2013/07/08 05:24:34 msaitoh Exp $   */
 /*
  * Copyright (c) 2001 Wind River Systems
  * Copyright (c) 1997, 1998, 1999, 2001
@@ -2631,7 +2631,8 @@
 #define BGE_5714_FAMILY                0x01000000
 #define BGE_5700_FAMILY                0x02000000
 #define        BGE_5717_PLUS           0x04000000
-#define        BGE_57765_PLUS          0x08000000
-#define        BGE_APE                 0x10000000
-#define        BGE_CPMU_PRESENT        0x20000000
+#define        BGE_57765_FAMILY        0x08000000
+#define        BGE_57765_PLUS          0x10000000
+#define        BGE_APE                 0x20000000
+#define        BGE_CPMU_PRESENT        0x40000000
 #define BGE_TSO                        0x80000000