[src/netbsd-7]: src/sys/dev/ic Pull up following revision(s) (requested by jm...

[snj <snj%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cf24e0ce9d00
branches:  netbsd-7
changeset: 799737:cf24e0ce9d00
user:      snj <snj%NetBSD.org@localhost>
date:      Sat Dec 26 22:23:20 2015 +0000

description:
Pull up following revision(s) (requested by jmcneill in ticket #1053):
        sys/dev/ic/dwc_gmac_reg.h: revision 1.15
Fix an off by one in the bit definition for RX store and forward mode.
Pointed out by ganbold.
While there add a few other bits of the same register.

diffstat:

 sys/dev/ic/dwc_gmac_reg.h |  9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diffs (24 lines):

diff -r 5f6ddeb6764f -r cf24e0ce9d00 sys/dev/ic/dwc_gmac_reg.h
--- a/sys/dev/ic/dwc_gmac_reg.h Sat Dec 26 22:18:57 2015 +0000
+++ b/sys/dev/ic/dwc_gmac_reg.h Sat Dec 26 22:23:20 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc_gmac_reg.h,v 1.12.2.3 2015/02/03 08:11:21 bouyer Exp $ */
+/* $NetBSD: dwc_gmac_reg.h,v 1.12.2.4 2015/12/26 22:23:20 snj Exp $ */
 
 /*-
  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@@ -131,8 +131,13 @@
 #define        AWIN_GMAC_MII_IRQ               __BIT(0)
 
 
-#define        GMAC_DMA_OP_RXSTOREFORWARD      __BIT(24) /* start RX when a
+#define        GMAC_DMA_OP_DISABLECSDROP       __BIT(26) /* disable dropping of
+                                                    frames with TCP/IP
+                                                    checksum errors */
+#define        GMAC_DMA_OP_RXSTOREFORWARD      __BIT(25) /* start RX when a
                                                    full frame is available */
+#define        GMAC_DMA_OP_DISABLERXFLUSH      __BIT(24) /* Do not drop frames
+                                                    when out of RX descr. */
 #define        GMAC_DMA_OP_TXSTOREFORWARD      __BIT(21) /* start TX when a
                                                    full frame is available */
 #define        GMAC_DMA_OP_FLUSHTX             __BIT(20) /* flush TX fifo */