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[src/trunk]: src/sys/arch/evbarm/exynos try 2
details: https://anonhg.NetBSD.org/src/rev/41f132773d7d
branches: trunk
changeset: 812237:41f132773d7d
user: marty <marty%NetBSD.org@localhost>
date: Sun Dec 06 00:33:44 2015 +0000
description:
try 2
diffstat:
sys/arch/evbarm/exynos/exynos_machdep.c | 484 ++++++++++++++++++++++++++++++++
sys/arch/evbarm/exynos/exynos_start.S | 308 ++++++++++++++++++++
sys/arch/evbarm/exynos/platform.h | 47 +++
3 files changed, 839 insertions(+), 0 deletions(-)
diffs (truncated from 851 to 300 lines):
diff -r 4a3fe2e30312 -r 41f132773d7d sys/arch/evbarm/exynos/exynos_machdep.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/evbarm/exynos/exynos_machdep.c Sun Dec 06 00:33:44 2015 +0000
@@ -0,0 +1,484 @@
+/* $NetBSD: exynos_machdep.c,v 1.1 2015/12/06 00:33:44 marty Exp $ */
+
+/*
+ * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Reinoud Zandijk.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: exynos_machdep.c,v 1.1 2015/12/06 00:33:44 marty Exp $");
+
+#include "opt_evbarm_boardtype.h"
+#include "opt_exynos.h"
+#include "opt_machdep.h"
+#include "opt_ddb.h"
+#include "opt_kgdb.h"
+#include "opt_ipkdb.h"
+#include "opt_md.h"
+#include "opt_sscom.h"
+#include "opt_arm_debug.h"
+
+#include "ukbd.h"
+#include "arml2cc.h" // RPZ why is it not called opt_l2cc.h?
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+#include <sys/exec.h>
+#include <sys/kernel.h>
+#include <sys/ksyms.h>
+#include <sys/msgbuf.h>
+#include <sys/proc.h>
+#include <sys/reboot.h>
+#include <sys/termios.h>
+#include <sys/gpio.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <sys/conf.h>
+#include <dev/cons.h>
+#include <dev/md.h>
+
+#include <machine/db_machdep.h>
+#include <ddb/db_sym.h>
+#include <ddb/db_extern.h>
+#ifdef KGDB
+#include <sys/kgdb.h>
+#endif
+
+#include <machine/bootconfig.h>
+#include <arm/armreg.h>
+#include <arm/undefined.h>
+#include <arm/cortex/pl310_var.h>
+
+#include <arm/arm32/machdep.h>
+#include <arm/mainbus/mainbus.h>
+
+#include <arm/samsung/exynos4_reg.h>
+#include <arm/samsung/exynos5_reg.h>
+#include <arm/samsung/exynos_var.h>
+
+#include <evbarm/include/autoconf.h>
+#include <evbarm/exynos/platform.h>
+
+#include <dev/i2c/i2cvar.h>
+#include <dev/i2c/ddcreg.h>
+
+#include <dev/usb/ukbdvar.h>
+#include <net/if_ether.h>
+
+/* serial console stuff */
+#include "sscom.h"
+#include "opt_sscom.h"
+
+#include <arm/samsung/sscom_var.h>
+#include <arm/samsung/sscom_reg.h>
+
+extern const int num_exynos_uarts_entries;
+extern const struct sscom_uart_info exynos_uarts[];
+
+#ifndef CONSPEED
+#define CONSPEED 115200
+#endif /* CONSPEED */
+#ifndef CONMODE
+#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB | HUPCL)) | CS8) /* 8N1 */
+#endif /* CONMODE */
+
+static const int conspeed = CONSPEED;
+static const int conmode = CONMODE;
+
+/*
+ * uboot passes 4 arguments to us.
+ *
+ * arg0 arg1 arg2 arg3 : the `bootargs' environment variable from the uboot
+ * context (in PA!)
+ *
+ * Note that the storage has to be in .data and not in .bss. On kernel start
+ * the .bss is cleared and this information would get lost.
+ */
+uintptr_t uboot_args[4] = { 0 };
+
+/*
+ * argument and boot configure storage
+ */
+BootConfig bootconfig; /* for pmap's sake */
+char bootargs[MAX_BOOT_STRING] = ""; /* copied string from uboot */
+char *boot_args = NULL; /* MI bootargs */
+char *boot_file = NULL; /* MI bootfile */
+uint8_t uboot_enaddr[ETHER_ADDR_LEN] = {};
+
+
+/*
+ * kernel start and end from the linker
+ */
+extern char KERNEL_BASE_phys[]; /* physical start of kernel */
+extern char _end[]; /* physical end of kernel */
+#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
+
+#define EXYNOS_IOPHYSTOVIRT(a) \
+ ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
+
+static void exynos_reset(void);
+static void exynos_powerdown(void);
+/* XXX we have no framebuffer implementation yet so com is console XXX */
+int use_fb_console = false;
+
+
+/* prototypes */
+void consinit(void);
+#ifdef KGDB
+static void kgdb_port_init(void);
+#endif
+static void exynos_extract_mac_adress(void);
+void exynos_device_register(device_t self, void *aux);
+void exynos_device_register_post_config(device_t self, void *aux);
+
+/*
+ * Our static device mappings at fixed virtual addresses so we can use them
+ * while booting the kernel.
+ *
+ * Map the extents segment-aligned and segment-rounded in size to avoid L2
+ * page tables
+ */
+
+#define _A(a) ((a) & ~L1_S_OFFSET)
+#define _S(s) (((s) + L1_S_SIZE - 1) & (~(L1_S_SIZE-1)))
+
+static const struct pmap_devmap e5_devmap[] = {
+ {
+ /* map in core IO space */
+ .pd_va = _A(EXYNOS_CORE_VBASE),
+ .pd_pa = _A(EXYNOS_CORE_PBASE),
+ .pd_size = _S(EXYNOS5_CORE_SIZE),
+ .pd_prot = VM_PROT_READ | VM_PROT_WRITE,
+ .pd_cache = PTE_NOCACHE
+ },
+ {
+ /* map in audiocore IO space */
+ .pd_va = _A(EXYNOS5_AUDIOCORE_VBASE),
+ .pd_pa = _A(EXYNOS5_AUDIOCORE_PBASE),
+ .pd_size = _S(EXYNOS5_AUDIOCORE_SIZE),
+ .pd_prot = VM_PROT_READ | VM_PROT_WRITE,
+ .pd_cache = PTE_NOCACHE
+ },
+ {0}
+};
+#undef _A
+#undef _S
+
+#ifdef PMAP_NEED_ALLOC_POOLPAGE
+static struct boot_physmem bp_highgig = {
+ .bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
+ .bp_freelist = VM_FREELIST_ISADMA,
+ .bp_flags = 0,
+};
+#endif
+
+#ifdef VERBOSE_INIT_ARM
+extern void exynos_putchar(int);
+
+static void
+exynos_putstr(const char *s)
+{
+ for (const char *p = s; *p; p++) {
+ exynos_putchar(*p);
+ }
+}
+
+static void
+exynos_printn(u_int n, int base)
+{
+ char *p, buf[(sizeof(u_int) * NBBY / 3) + 1 + 2 /* ALT + SIGN */];
+
+ p = buf;
+ do {
+ *p++ = hexdigits[n % base];
+ } while (n /= base);
+
+ do {
+ exynos_putchar(*--p);
+ } while (p > buf);
+}
+#define DPRINTF(...) printf(__VA_ARGS__)
+#define DPRINT(x) exynos_putstr(x)
+#define DPRINTN(x,b) exynos_printn((x), (b))
+#else
+#define DPRINTF(...)
+#define DPRINT(x)
+#define DPRINTN(x,b)
+#endif
+
+extern void cortex_mpstart(void);
+
+/*
+ * u_int initarm(...)
+ *
+ * Our entry point from the assembly before main() is called.
+ * - take a copy of the config we got from uboot
+ * - init the physical console
+ * - setting up page tables for the kernel
+ */
+
+u_int
+initarm(void *arg)
+{
+ const struct pmap_devmap const *devmap;
+ bus_addr_t rambase;
+ psize_t ram_size;
+ DPRINT("initarm:");
+
+ DPRINT(" mpstart<0x");
+ DPRINTN((uint32_t)cortex_mpstart, 16);
+ DPRINT(">");
+
+ /* allocate/map our basic memory mapping */
+ switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
+#if defined(EXYNOS5)
+ case EXYNOS5_PRODUCT_FAMILY:
+ devmap = e5_devmap;
+ rambase = EXYNOS5_SDRAM_PBASE;
+ break;
+#endif
+ default:
+ /* Won't work, but... */
+ panic("Unknown product family %llx",
+ EXYNOS_PRODUCT_FAMILY(exynos_soc_id));
+ }
+ DPRINT(" devmap");
+ pmap_devmap_register(devmap);
+
+ /* bootstrap soc. uart_address is determined in exynos_start */
+ paddr_t uart_address = armreg_tpidruro_read();
+ DPRINT(" bootstrap");
+ exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
+
+ /* set up CPU / MMU / TLB functions */
+ DPRINT(" cpufunc");
+ if (set_cpufuncs())
+ panic("cpu not recognized!");
+
+ /* get normal console working */
+ DPRINT(" consinit");
+ consinit();
+
+#ifdef KGDB
+ kgdb_port_init();
+#endif
+
+#ifdef VERBOSE_INIT_ARM
+ printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
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