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[src/netbsd-7]: src/sys/dev/mii Pull up following revision(s) (requested by j...



details:   https://anonhg.NetBSD.org/src/rev/39bef209e278
branches:  netbsd-7
changeset: 799621:39bef209e278
user:      riz <riz%NetBSD.org@localhost>
date:      Wed Nov 04 17:50:37 2015 +0000

description:
Pull up following revision(s) (requested by jmcneill in ticket #960):
        sys/dev/mii/rgephy.c: revision 1.40
        sys/dev/mii/rgephyreg.h: revision 1.9
Disable link down power save mode and energy efficient ethernet on RTL8211F.
add some more RTL8211F bits

diffstat:

 sys/dev/mii/rgephy.c    |  21 +++++++++++++++------
 sys/dev/mii/rgephyreg.h |   7 ++++++-
 2 files changed, 21 insertions(+), 7 deletions(-)

diffs (68 lines):

diff -r b87451eaa28c -r 39bef209e278 sys/dev/mii/rgephy.c
--- a/sys/dev/mii/rgephy.c      Wed Nov 04 17:46:21 2015 +0000
+++ b/sys/dev/mii/rgephy.c      Wed Nov 04 17:50:37 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: rgephy.c,v 1.35.4.3 2015/04/30 19:15:10 snj Exp $      */
+/*     $NetBSD: rgephy.c,v 1.35.4.4 2015/11/04 17:50:37 riz Exp $      */
 
 /*
  * Copyright (c) 2003
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.35.4.3 2015/04/30 19:15:10 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.35.4.4 2015/11/04 17:50:37 riz Exp $");
 
 
 /*
@@ -637,10 +637,9 @@
        } else if (sc->mii_mpd_rev == 6) {
                /* RTL8211F */
                phycr1 = PHY_READ(sc, RGEPHY_MII_PHYCR1);
-               if ((phycr1 & RGEPHY_PHYCR1_MDI_MMCE) != 0) {
-                       phycr1 &= ~RGEPHY_PHYCR1_MDI_MMCE;
-                       PHY_WRITE(sc, RGEPHY_MII_PHYCR1, phycr1);
-               }
+               phycr1 &= ~RGEPHY_PHYCR1_MDI_MMCE;
+               phycr1 &= ~RGEPHY_PHYCR1_ALDPS_EN;
+               PHY_WRITE(sc, RGEPHY_MII_PHYCR1, phycr1);
        } else {
                PHY_WRITE(sc, 0x1F, 0x0000);
                PHY_WRITE(sc, 0x0e, 0x0000);
@@ -657,4 +656,14 @@
        /* Step2: Restart NWay */
        /* NWay enable and Restart NWay */
        PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
+
+       if (sc->mii_mpd_rev == 6) {
+               /* RTL8211F */
+               delay(10000);
+               /* disable EEE */
+               PHY_WRITE(sc, RGEPHY_MII_MACR, 0x0007);
+               PHY_WRITE(sc, RGEPHY_MII_MAADR, 0x003c);
+               PHY_WRITE(sc, RGEPHY_MII_MACR, 0x4007);
+               PHY_WRITE(sc, RGEPHY_MII_MAADR, 0x0000);
+       }
 }
diff -r b87451eaa28c -r 39bef209e278 sys/dev/mii/rgephyreg.h
--- a/sys/dev/mii/rgephyreg.h   Wed Nov 04 17:46:21 2015 +0000
+++ b/sys/dev/mii/rgephyreg.h   Wed Nov 04 17:50:37 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: rgephyreg.h,v 1.6.34.2 2015/04/30 19:15:10 snj Exp $   */
+/*     $NetBSD: rgephyreg.h,v 1.6.34.3 2015/11/04 17:50:37 riz Exp $   */
 
 /*
  * Copyright (c) 2003
@@ -58,6 +58,11 @@
 /* RTL8211F */
 #define RGEPHY_MII_PHYCR1      0x18    /* PHY Specific control register 1 */
 #define RGEPHY_PHYCR1_MDI_MMCE __BIT(9)
+#define RGEPHY_PHYCR1_ALDPS_EN __BIT(2)
+#define RGEPHY_MII_MACR                0x0d    /* MMD Access control register */
+#define RGEPHY_MACR_FUNCTION   __BITS(15,14)
+#define RGEPHY_MACR_DEVAD      __BITS(4,0)
+#define RGEPHY_MII_MAADR       0x0e    /* MMD Access address data register */
 
 #define RGEPHY_MII_PHYSR       0x1a    /* PHY Specific status register */
 #define RGEPHY_PHYSR_ALDPS     __BIT(14)



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