[src/trunk]: src/sys/arch Retire CPUFREQ option, instead just pick the highes...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/0ddf4908633b
branches:  trunk
changeset: 812070:0ddf4908633b
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Nov 29 16:52:00 2015 +0000

description:
Retire CPUFREQ option, instead just pick the highest available frequency
at boot. Update the list of supported frequencies to match the list of dvfs
frequencies from the meson8b dts, capped at 1.5GHz. The highest available
frequency is changed from 1512MHz to 1536MHz.

diffstat:

 sys/arch/arm/amlogic/amlogic_cpufreq.c |  22 +++++++++++-----------
 sys/arch/arm/amlogic/amlogic_crureg.h  |  12 +++++++++++-
 sys/arch/arm/amlogic/files.amlogic     |   5 +----
 sys/arch/evbarm/conf/ODROID-C1         |   3 +--
 4 files changed, 24 insertions(+), 18 deletions(-)

diffs (128 lines):

diff -r 4d273d163268 -r 0ddf4908633b sys/arch/arm/amlogic/amlogic_cpufreq.c
--- a/sys/arch/arm/amlogic/amlogic_cpufreq.c    Sun Nov 29 15:58:07 2015 +0000
+++ b/sys/arch/arm/amlogic/amlogic_cpufreq.c    Sun Nov 29 16:52:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_cpufreq.c,v 1.3 2015/03/29 22:49:44 jmcneill Exp $ */
+/* $NetBSD: amlogic_cpufreq.c,v 1.4 2015/11/29 16:52:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
 #include "opt_amlogic.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_cpufreq.c,v 1.3 2015/03/29 22:49:44 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_cpufreq.c,v 1.4 2015/11/29 16:52:00 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -57,7 +57,7 @@
 static u_int (*cpufreq_get_rate)(void);
 static size_t (*cpufreq_get_available)(u_int *, size_t);
 
-#define AMLOGIC_CPUFREQ_MAX    8
+#define AMLOGIC_CPUFREQ_MAX    16
 
 static void    amlogic_cpufreq_cb(void *, void *);
 static int     amlogic_cpufreq_freq_helper(SYSCTLFN_PROTO);
@@ -77,15 +77,17 @@
 void
 amlogic_cpufreq_bootstrap(void)
 {
+       u_int availfreq[AMLOGIC_CPUFREQ_MAX];
+
        cpufreq_set_rate = &meson8b_cpu_set_rate;
        cpufreq_get_rate = &meson8b_cpu_get_rate;
        cpufreq_get_available = &meson8b_cpu_get_available;
 
-#ifdef CPUFREQ
-       if (cpufreq_set_rate(CPUFREQ) == 0) {
-               amlogic_cpufreq_cb(NULL, NULL);
+       if (cpufreq_get_available(availfreq, AMLOGIC_CPUFREQ_MAX) > 0) {
+               if (cpufreq_set_rate(availfreq[0]) == 0) {
+                       amlogic_cpufreq_cb(NULL, NULL);
+               }
        }
-#endif
 }
 
 void
@@ -204,7 +206,7 @@
  * meson8b
  */
 static const u_int meson8b_rates[] = {
-       1512, 1416, 1320, 1200
+       1536, 1488, 1320, 1200, 1008, 816, 720, 600, 504, 408, 312, 192, 96
 };
 
 static size_t
@@ -230,10 +232,8 @@
        const u_int old_rate = meson8b_cpu_get_rate();
        u_int new_rate = 0;
 
-       /* Pick the closest rate (nearest 100MHz increment) */
        for (int i = 0; i < __arraycount(meson8b_rates); i++) {
-               u_int arate = (meson8b_rates[i] + 50) / 100 * 100;
-               if (arate <= rate) {
+               if (meson8b_rates[i] == rate) {
                        new_rate = meson8b_rates[i] * 1000000;
                        break;
                }
diff -r 4d273d163268 -r 0ddf4908633b sys/arch/arm/amlogic/amlogic_crureg.h
--- a/sys/arch/arm/amlogic/amlogic_crureg.h     Sun Nov 29 15:58:07 2015 +0000
+++ b/sys/arch/arm/amlogic/amlogic_crureg.h     Sun Nov 29 16:52:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_crureg.h,v 1.11 2015/05/29 12:41:14 jmcneill Exp $ */
+/* $NetBSD: amlogic_crureg.h,v 1.12 2015/11/29 16:52:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -167,4 +167,14 @@
 #define WATCHDOG_RESET_REG             CBUS_REG(0x2641)
 #define WATCHDOG_RESET_COUNT           __BITS(15,0)
 
+#define ISA_TIMER_MUX_REG              CBUS_REG(0x2650)
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL __BITS(10,8)
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL_SYS     0
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL_1US     1
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL_10US    2
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL_100US   3
+#define ISA_TIMER_MUX_TIMERE_INPUT_SEL_1MS     4
+
+#define ISA_TIMERE_REG                 CBUS_REG(0x2655)
+
 #endif /* _ARM_AMLOGIC_CRUREG_H */
diff -r 4d273d163268 -r 0ddf4908633b sys/arch/arm/amlogic/files.amlogic
--- a/sys/arch/arm/amlogic/files.amlogic        Sun Nov 29 15:58:07 2015 +0000
+++ b/sys/arch/arm/amlogic/files.amlogic        Sun Nov 29 16:52:00 2015 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.amlogic,v 1.12 2015/04/25 14:41:33 jmcneill Exp $
+#      $NetBSD: files.amlogic,v 1.13 2015/11/29 16:52:00 jmcneill Exp $
 #
 # Configuration info for Amlogic ARM Peripherals
 #
@@ -70,6 +70,3 @@
 
 # Memory parameters
 defparam opt_amlogic.h                 MEMSIZE
-
-# CPU parameters
-defparam opt_amlogic.h                 CPUFREQ
diff -r 4d273d163268 -r 0ddf4908633b sys/arch/evbarm/conf/ODROID-C1
--- a/sys/arch/evbarm/conf/ODROID-C1    Sun Nov 29 15:58:07 2015 +0000
+++ b/sys/arch/evbarm/conf/ODROID-C1    Sun Nov 29 16:52:00 2015 +0000
@@ -1,5 +1,5 @@
 #
-#      $NetBSD: ODROID-C1,v 1.20 2015/08/08 14:01:44 jmcneill Exp $
+#      $NetBSD: ODROID-C1,v 1.21 2015/11/29 16:52:00 jmcneill Exp $
 #
 #      Hardkernel ODROID-C1 (Amlogic S805) based SBC (Single Board Computer)
 #
@@ -9,7 +9,6 @@
 
 options        CPU_CORTEXA5
 options        MULTIPROCESSOR
-options        CPUFREQ=1512
 
 options        DIAGNOSTIC
 #options       DEBUG