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[src/trunk]: src/sys/dev/pci wscons driver for Intel Graphics Media Accelerator.
details: https://anonhg.NetBSD.org/src/rev/acb78d9154d2
branches: trunk
changeset: 792903:acb78d9154d2
user: mlelstv <mlelstv%NetBSD.org@localhost>
date: Tue Jan 21 14:52:07 2014 +0000
description:
wscons driver for Intel Graphics Media Accelerator.
Initial commit that already works for a couple of Notebooks
based on G35, G45, Sandy Bridge and Ivy Bridge chips.
Despite the word 'Accelerator' there is nothing acclerated yet.
diffstat:
sys/dev/pci/files.pci | 8 +-
sys/dev/pci/igma.c | 642 ++++++++++++++++++++++++++++++++++++++++++++++
sys/dev/pci/igma/igmafb.c | 590 ++++++++++++++++++++++++++++++++++++++++++
sys/dev/pci/igmareg.h | 197 ++++++++++++++
sys/dev/pci/igmavar.h | 76 +++++
5 files changed, 1512 insertions(+), 1 deletions(-)
diffs (truncated from 1543 to 300 lines):
diff -r 069a62fe105e -r acb78d9154d2 sys/dev/pci/files.pci
--- a/sys/dev/pci/files.pci Tue Jan 21 13:51:44 2014 +0000
+++ b/sys/dev/pci/files.pci Tue Jan 21 14:52:07 2014 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.pci,v 1.367 2013/09/18 14:30:45 macallan Exp $
+# $NetBSD: files.pci,v 1.368 2014/01/21 14:52:07 mlelstv Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@@ -1128,6 +1128,12 @@
attach lynxfb at pci
file dev/pci/lynxfb.c lynxfb needs-flag
+include "dev/pci/igma/files.igma"
+# Intel GMA
+device igma: igmabus, i2cbus, i2c_bitbang, ddc_read_edid, edid
+attach igma at pci
+file dev/pci/igma.c igma
+
# 3Dfx Voodoo Graphics
defflag opt_tdvfb.h TDVFB_CONSOLE
device tdvfb: wsemuldisplaydev, rasops16, rasops32, vcons, videomode
diff -r 069a62fe105e -r acb78d9154d2 sys/dev/pci/igma.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/pci/igma.c Tue Jan 21 14:52:07 2014 +0000
@@ -0,0 +1,642 @@
+/* $NetBSD: igma.c,v 1.1 2014/01/21 14:52:07 mlelstv Exp $ */
+
+/*
+ * Copyright (c) 2014 Michael van Elst
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Intel Graphic Media Accelerator
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: igma.c,v 1.1 2014/01/21 14:52:07 mlelstv Exp $");
+
+#include "vga.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+#include <dev/pci/pciio.h>
+
+#include <dev/i2c/i2cvar.h>
+#include <dev/i2c/i2c_bitbang.h>
+#include <dev/i2c/ddcvar.h>
+
+#include <dev/videomode/videomode.h>
+#include <dev/videomode/edidvar.h>
+
+#include <dev/wscons/wsdisplayvar.h>
+
+#if NVGA > 0
+#include <dev/ic/mc6845reg.h>
+#include <dev/ic/pcdisplayvar.h>
+#include <dev/ic/vgareg.h>
+#include <dev/ic/vgavar.h>
+#endif
+
+#include <dev/pci/igmareg.h>
+#include <dev/pci/igmavar.h>
+
+#include "igmafb.h"
+
+struct igma_softc;
+struct igma_i2c {
+ kmutex_t ii_lock;
+ struct igma_softc *ii_sc;
+ bus_addr_t ii_reg;
+ struct i2c_controller ii_i2c;
+ const char *ii_name;
+ u_int32_t ii_dir;
+};
+
+struct igma_softc {
+ device_t sc_dev;
+ struct igma_chip sc_chip;
+ struct igma_i2c sc_ii[GMBUS_NUM_PORTS];
+};
+
+static int igma_match(device_t, cfdata_t, void *);
+static void igma_attach(device_t, device_t, void *);
+static int igma_print(void *, const char *);
+
+static void igma_i2c_attach(struct igma_softc *);
+
+CFATTACH_DECL_NEW(igma, sizeof(struct igma_softc),
+ igma_match, igma_attach, NULL, NULL);
+
+static int igma_i2c_acquire_bus(void *, int);
+static void igma_i2c_release_bus(void *, int);
+static int igma_i2c_send_start(void *, int);
+static int igma_i2c_send_stop(void *, int);
+static int igma_i2c_initiate_xfer(void *, i2c_addr_t, int);
+static int igma_i2c_read_byte(void *, uint8_t *, int);
+static int igma_i2c_write_byte(void *, uint8_t, int);
+static void igma_i2cbb_set_bits(void *, uint32_t);
+static void igma_i2cbb_set_dir(void *, uint32_t);
+static uint32_t igma_i2cbb_read(void *);
+
+static void igma_reg_barrier(const struct igma_chip *, int);
+static u_int32_t igma_reg_read(const struct igma_chip *, int);
+static void igma_reg_write(const struct igma_chip *, int, u_int32_t);
+static u_int8_t igma_vga_read(const struct igma_chip *, int);
+static void igma_vga_write(const struct igma_chip *, int , u_int8_t);
+#if 0
+static u_int8_t igma_crtc_read(const struct igma_chip *, int);
+static void igma_crtc_write(const struct igma_chip *, int, u_int8_t);
+#endif
+
+static const struct i2c_bitbang_ops igma_i2cbb_ops = {
+ igma_i2cbb_set_bits,
+ igma_i2cbb_set_dir,
+ igma_i2cbb_read,
+ { 1, 2, 0, 1 }
+};
+
+static const struct igma_chip_ops igma_bus_ops = {
+ igma_reg_barrier,
+ igma_reg_read,
+ igma_reg_write,
+ igma_vga_read,
+ igma_vga_write,
+#if 0
+ igma_crtc_read,
+ igma_crtc_write,
+#endif
+};
+
+static struct igma_product {
+ u_int16_t product;
+ int gentype;
+ int num_pipes;
+} const igma_products[] = {
+ /* i830 */
+ { PCI_PRODUCT_INTEL_82830MP_IV, 200,2 },
+ /* i845g */
+ { PCI_PRODUCT_INTEL_82845G_IGD, 200,2 },
+ /* i85x */
+ { PCI_PRODUCT_INTEL_82855GM_IGD, 200,2 },
+// 0x358e ?
+ /* i865g */
+ { PCI_PRODUCT_INTEL_82865_IGD, 200,2 },
+ /* i915g */
+ { PCI_PRODUCT_INTEL_82915G_IGD, 200,2 },
+ { PCI_PRODUCT_INTEL_E7221_IGD, 200,2 },
+ /* i915gm */
+ { PCI_PRODUCT_INTEL_82915GM_IGD, 300,2 },
+ /* i945g */
+ { PCI_PRODUCT_INTEL_82945P_IGD, 300,2 },
+ /* i945gm */
+ { PCI_PRODUCT_INTEL_82945GM_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82945GM_IGD_1, 300,2 },
+ { PCI_PRODUCT_INTEL_82945GME_IGD, 300,2 },
+ /* i965g */
+ { PCI_PRODUCT_INTEL_82946GZ_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82G35_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82G35_IGD_1, 300,2 },
+ { PCI_PRODUCT_INTEL_82965Q_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82965Q_IGD_1, 300,2 },
+ { PCI_PRODUCT_INTEL_82965G_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82965G_IGD_1, 300,2 },
+ /* g33 */
+ { PCI_PRODUCT_INTEL_82G33_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82G33_IGD_1, 300,2 },
+ { PCI_PRODUCT_INTEL_82Q33_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82Q33_IGD_1, 300,2 },
+ { PCI_PRODUCT_INTEL_82Q35_IGD, 300,2 },
+ { PCI_PRODUCT_INTEL_82Q35_IGD_1, 300,2 },
+ /* pineview */
+ { PCI_PRODUCT_INTEL_PINEVIEW_IGD, 350,2 },
+ { PCI_PRODUCT_INTEL_PINEVIEW_M_IGD, 350,2 },
+ /* i965gm */
+ { PCI_PRODUCT_INTEL_82965PM_IGD, 400,2 },
+ { PCI_PRODUCT_INTEL_82965PM_IGD_1, 400,2 },
+ { PCI_PRODUCT_INTEL_82965GME_IGD, 400,2 },
+ /* gm45 */
+ { PCI_PRODUCT_INTEL_82GM45_IGD, 450,2 },
+ { PCI_PRODUCT_INTEL_82GM45_IGD_1, 450,2 },
+ /* g45 */
+ { PCI_PRODUCT_INTEL_82IGD_E_IGD, 450,2 },
+ { PCI_PRODUCT_INTEL_82Q45_IGD, 450,2 },
+ { PCI_PRODUCT_INTEL_82G45_IGD, 450,2 },
+ { PCI_PRODUCT_INTEL_82G41_IGD, 450,2 },
+ { PCI_PRODUCT_INTEL_82B43_IGD, 450,2 },
+// 0x2e92 ?
+ /* ironlake d */
+ { PCI_PRODUCT_INTEL_IRONLAKE_D_IGD, 500,2 },
+ /* ironlake m */
+ { PCI_PRODUCT_INTEL_IRONLAKE_M_IGD, 500,2 },
+ /* sandy bridge */
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD, 600,2 },
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD_1, 600,2 },
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD_2, 600,2 },
+ /* sandy bridge m */
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD, 600,2 },
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD_1, 600,2 },
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD_2, 600,2 },
+ /* sandy bridge s */
+ { PCI_PRODUCT_INTEL_SANDYBRIDGE_S_IGD, 600,2 },
+ /* ivy bridge */
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_IGD, 700,3 },
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_IGD_1, 700,3 },
+ /* ivy bridge m */
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_M_IGD, 700,3 },
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_M_IGD_1, 700,3 },
+ /* ivy bridge s */
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_S_IGD, 700,3 },
+ { PCI_PRODUCT_INTEL_IVYBRIDGE_S_IGD_1, 700,3 },
+#if 0
+ /* valleyview d */
+ /* valleyview m */
+ { PCI_PRODUCT_INTEL_HASWELL_IGD_1, 800,3 },
+ /* haswell d */
+ { PCI_PRODUCT_INTEL_HASWELL_IGD, 800,3 },
+ { PCI_PRODUCT_INTEL_HASWELL_IGD_1, 800,3 },
+ /* haswell m */
+ /* broadwell d */
+ /* broadwell m */
+#endif
+};
+
+static int
+igma_newpch_match(const struct pci_attach_args *pa)
+{
+ if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
+ return 0;
+ switch (0xff00 & PCI_PRODUCT(pa->pa_id)) {
+ case 0x3b00: /* ibex peak */
+ case 0x1c00: /* cougar point */
+ case 0x1e00: /* panther point */
+ case 0x8c00: /* lynx point */
+ case 0x9c00: /* lynx point lp */
+ return 1;
+ }
+
+ return 0;
+}
+
+static const struct igma_product *
+igma_lookup(const struct pci_attach_args *pa)
+{
+ const struct igma_product *ip;
+ int i;
+
+ if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
+ return NULL;
+ for (i=0; i < __arraycount(igma_products); ++i) {
+ ip = &igma_products[i];
+ if (PCI_PRODUCT(pa->pa_id) == ip->product)
+ return ip;
+ }
+ return NULL;
+}
+
+static void
+igma_product_to_chip(const struct pci_attach_args *pa, struct igma_chip *cd)
+{
+ const struct igma_product *ip;
+ struct pci_attach_args PA;
+
+ ip = igma_lookup(pa);
+ KASSERT(ip != NULL);
+
+ cd->ops = &igma_bus_ops;
+ cd->num_gmbus = 6;
+ cd->num_pipes = ip->num_pipes;
+ cd->quirks = 0;
+ cd->backlight_factor = 1;
+
+ cd->gpio_offset = OLD_GPIOA;
+ cd->vga_cntrl = PCH_VGA_CNTRL;
+ cd->backlight_cntrl = OLD_BLC_PWM_CTL;
+ cd->backlight_cntrl2 = OLD_BLC_PWM_CTL2;
+
+ PA = *pa;
+ if (pci_find_device(&PA, igma_newpch_match)) {
+ cd->gpio_offset = PCH_GPIOA;
+ cd->vga_cntrl = CPU_VGA_CNTRL;
+ cd->backlight_cntrl = CPU_BLC_PWM_CTL;
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