[src/trunk]: src/sys/arch/powerpc save & restore HID4 and HID5, zero SPR_HIOR...

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/5e852ce2de51
branches:  trunk
changeset: 832256:5e852ce2de51
user:      macallan <macallan%NetBSD.org@localhost>
date:      Fri May 04 17:01:29 2018 +0000

description:
save & restore HID4 and HID5, zero SPR_HIOR on 970

diffstat:

 sys/arch/powerpc/include/cpu.h  |   4 +++-
 sys/arch/powerpc/oea/cpu_subr.c |  13 +++++++++++--
 2 files changed, 14 insertions(+), 3 deletions(-)

diffs (60 lines):

diff -r 37246d6525c9 -r 5e852ce2de51 sys/arch/powerpc/include/cpu.h
--- a/sys/arch/powerpc/include/cpu.h    Fri May 04 16:57:14 2018 +0000
+++ b/sys/arch/powerpc/include/cpu.h    Fri May 04 17:01:29 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.104 2018/03/22 15:18:05 macallan Exp $       */
+/*     $NetBSD: cpu.h,v 1.105 2018/05/04 17:01:29 macallan Exp $       */
 
 /*
  * Copyright (C) 1999 Wolfgang Solfrank.
@@ -164,6 +164,8 @@
        uint32_t hatch_tbl;
 #if defined(PPC_OEA64_BRIDGE) || defined (_ARCH_PPC64)
        uint64_t hatch_hid0;
+       uint64_t hatch_hid4;
+       uint64_t hatch_hid5;
 #else
        uint32_t hatch_hid0;
 #endif
diff -r 37246d6525c9 -r 5e852ce2de51 sys/arch/powerpc/oea/cpu_subr.c
--- a/sys/arch/powerpc/oea/cpu_subr.c   Fri May 04 16:57:14 2018 +0000
+++ b/sys/arch/powerpc/oea/cpu_subr.c   Fri May 04 17:01:29 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu_subr.c,v 1.92 2018/03/29 16:19:46 macallan Exp $   */
+/*     $NetBSD: cpu_subr.c,v 1.93 2018/05/04 17:01:29 macallan Exp $   */
 
 /*-
  * Copyright (c) 2001 Matt Thomas.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.92 2018/03/29 16:19:46 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.93 2018/05/04 17:01:29 macallan Exp $");
 
 #include "opt_ppcparam.h"
 #include "opt_ppccache.h"
@@ -1315,6 +1315,11 @@
        /* copy special registers */
 
        h->hatch_hid0 = mfspr(SPR_HID0);
+#if defined(PPC_OEA64_BRIDGE) || defined (_ARCH_PPC64)
+       h->hatch_hid4 = mfspr(SPR_HID4);
+       h->hatch_hid5 = mfspr(SPR_HID5);
+       printf("HIDs: %016llx %016llx\n", h->hatch_hid4, h->hatch_hid5);
+#endif
 
        __asm volatile ("mfsdr1 %0" : "=r"(h->hatch_sdr1));
        for (i = 0; i < 16; i++) {
@@ -1432,7 +1437,11 @@
 
 #ifdef PPC_OEA64_BRIDGE
        if ((oeacpufeat & OEACPU_64_BRIDGE) != 0) {
+
                mtspr64(SPR_HID0, h->hatch_hid0);
+               mtspr64(SPR_HID4, h->hatch_hid4);
+               mtspr64(SPR_HID5, h->hatch_hid5);
+               mtspr64(SPR_HIOR, 0);
        } else
 #endif
                mtspr(SPR_HID0, h->hatch_hid0);