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[src/trunk]: src/sys/dev/pci Add some OXPCIe952 devices.
details: https://anonhg.NetBSD.org/src/rev/b9db32704299
branches: trunk
changeset: 793085:b9db32704299
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Sun Jan 26 10:20:20 2014 +0000
description:
Add some OXPCIe952 devices.
diffstat:
sys/dev/pci/pucdata.c | 78 ++++++++++++++++++++++++++++++++++++++++++++++++--
1 files changed, 74 insertions(+), 4 deletions(-)
diffs (106 lines):
diff -r 6cfb760c6eb1 -r b9db32704299 sys/dev/pci/pucdata.c
--- a/sys/dev/pci/pucdata.c Sun Jan 26 10:19:37 2014 +0000
+++ b/sys/dev/pci/pucdata.c Sun Jan 26 10:20:20 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $ */
+/* $NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1020,15 +1020,85 @@
},
/* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_0,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_1,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
{ "Oxford Semiconductor OXPCIe952 UARTs",
- { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952,
- PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952 },
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S,
+ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
},
},
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_3,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_4,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_5,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_6,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
/* Oxford Semiconductor OXmPCI952 PCI UARTs */
{ "Oxford Semiconductor OXmPCI952 UARTs",
{ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_EXSYS_EX41092,
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