[src/trunk]: src/sys/dev/pci Fix a bug that the PHY address bits in MI_MODE r...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/07ebd64deda1
branches:  trunk
changeset: 786986:07ebd64deda1
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue May 28 05:55:40 2013 +0000

description:
Fix a bug that the PHY address bits in MI_MODE register is wrongly cleard.
Set the PHY address correctly.

diffstat:

 sys/dev/pci/if_bge.c    |  13 ++++++++-----
 sys/dev/pci/if_bgereg.h |   5 ++++-
 2 files changed, 12 insertions(+), 6 deletions(-)

diffs (66 lines):

diff -r 6d07cf79baa1 -r 07ebd64deda1 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Tue May 28 00:10:34 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Tue May 28 05:55:40 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.248 2013/05/24 11:47:47 msaitoh Exp $     */
+/*     $NetBSD: if_bge.c,v 1.249 2013/05/28 05:55:40 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.248 2013/05/24 11:47:47 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.249 2013/05/28 05:55:40 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -3267,7 +3267,7 @@
        uint32_t                hwcfg, hwcfg2, hwcfg3, hwcfg4;
        uint32_t                command;
        struct ifnet            *ifp;
-       uint32_t                misccfg;
+       uint32_t                misccfg, mimode;
        void *                  kva;
        u_char                  eaddr[ETHER_ADDR_LEN];
        pcireg_t                memtype, subid, reg;
@@ -3460,10 +3460,13 @@
            BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
                sc->bge_flags |= BGE_CPMU_PRESENT;
 
+       /* Set MI_MODE */
+       mimode = BGE_MIMODE_PHYADDR(sc->bge_phy_addr);
        if ((sc->bge_flags & BGE_CPMU_PRESENT) != 0)
-               CSR_WRITE_4(sc, BGE_MI_MODE, BGE_MIMODE_500KHZ_CONST);
+               mimode |= BGE_MIMODE_500KHZ_CONST;
        else
-               CSR_WRITE_4(sc, BGE_MI_MODE, BGE_MIMODE_BASE);
+               mimode |= BGE_MIMODE_BASE;
+       CSR_WRITE_4(sc, BGE_MI_MODE, mimode);
 
        /*
         * When using the BCM5701 in PCI-X mode, data corruption has
diff -r 6d07cf79baa1 -r 07ebd64deda1 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h   Tue May 28 00:10:34 2013 +0000
+++ b/sys/dev/pci/if_bgereg.h   Tue May 28 05:55:40 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bgereg.h,v 1.78 2013/05/14 00:27:39 msaitoh Exp $   */
+/*     $NetBSD: if_bgereg.h,v 1.79 2013/05/28 05:55:40 msaitoh Exp $   */
 /*
  * Copyright (c) 2001 Wind River Systems
  * Copyright (c) 1997, 1998, 1999, 2001
@@ -855,10 +855,13 @@
 
 #define BGE_MIMODE_SHORTPREAMBLE       0x00000002
 #define BGE_MIMODE_AUTOPOLL            0x00000010
+#define BGE_MIMODE_PHYADDR_SHIFT       5
+#define BGE_MIMODE_PHYADDR_MASK                0x000003E0
 #define BGE_MIMODE_CLKCNT              0x001F0000
 #define        BGE_MIMODE_500KHZ_CONST         0x00008000
 #define        BGE_MIMODE_BASE                 0x000C0000
 
+#define BGE_MIMODE_PHYADDR(x)          ((x) << BGE_MIMODE_PHYADDR_SHIFT)
 
 /*
  * Send data initiator control registers.