[src/trunk]: src/sys/arch/arm/cortex Clear TEX Remap Enable in SCTLR. U-Boot ...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c903e06f5dfd
branches:  trunk
changeset: 826464:c903e06f5dfd
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Sep 06 18:08:35 2017 +0000

description:
Clear TEX Remap Enable in SCTLR. U-Boot with CONFIG_ARMV8_SWITCH_TO_EL1
sets it since it is RES1 when TTBCR.EAE=1, but we are still using the
short descriptor format and don't currently support TEX remap.

ok skrll@

diffstat:

 sys/arch/arm/cortex/a9_mpsubr.S |  7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)

diffs (29 lines):

diff -r 98d45e2ecf45 -r c903e06f5dfd sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Wed Sep 06 17:15:54 2017 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Wed Sep 06 18:08:35 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.49 2017/07/24 19:37:41 joerg Exp $     */
+/*     $NetBSD: a9_mpsubr.S,v 1.50 2017/09/06 18:08:35 jmcneill Exp $  */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -166,7 +166,8 @@
 // bits to clear in the Control Register
 //
 #define CPU_CONTROL_CLR \
-       (CPU_CONTROL_AFLT_ENABLE_CLR)
+       (CPU_CONTROL_AFLT_ENABLE_CLR    |       \
+        CPU_CONTROL_TR_ENABLE)
 
 arm_cpuinit:
        // Because the MMU may already be on do a typical sequence to set
@@ -253,9 +254,7 @@
        movt    r3, #:upper16:CPU_CONTROL_SET
 #endif
        orr     r0, r1, r3
-#if defined(CPU_CONTROL_CLR) && (CPU_CONTROL_CLR != 0)
        bic     r0, r0, #CPU_CONTROL_CLR
-#endif
        //cmp   r0, r1                  // any changes to SCTLR?
        //bxeq  ip                      //    no, then return.