[src/trunk]: src/sys/arch/arm Add Cortex-A35 CPU ID.

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9c2e553466e4
branches:  trunk
changeset: 826601:9c2e553466e4
user:      matt <matt%NetBSD.org@localhost>
date:      Sat Sep 16 00:47:16 2017 +0000

description:
Add Cortex-A35 CPU ID.

diffstat:

 sys/arch/arm/arm32/cpu.c      |  6 ++++--
 sys/arch/arm/include/armreg.h |  4 +++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diffs (52 lines):

diff -r 022661d54b22 -r 9c2e553466e4 sys/arch/arm/arm32/cpu.c
--- a/sys/arch/arm/arm32/cpu.c  Fri Sep 15 23:08:11 2017 +0000
+++ b/sys/arch/arm/arm32/cpu.c  Sat Sep 16 00:47:16 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.115 2017/06/01 02:45:05 chs Exp $    */
+/*     $NetBSD: cpu.c,v 1.116 2017/09/16 00:47:16 matt Exp $   */
 
 /*
  * Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.115 2017/06/01 02:45:05 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.116 2017/09/16 00:47:16 matt Exp $");
 
 #include <sys/systm.h>
 #include <sys/conf.h>
@@ -514,6 +514,8 @@
          pN_steppings, "7A" },
        { CPU_ID_CORTEXA17R1,   CPU_CLASS_CORTEX,       "Cortex-A17 r1",
          pN_steppings, "7A" },
+       { CPU_ID_CORTEXA35R0,   CPU_CLASS_CORTEX,       "Cortex-A35 r0",
+         pN_steppings, "8A" },
        { CPU_ID_CORTEXA53R0,   CPU_CLASS_CORTEX,       "Cortex-A53 r0",
          pN_steppings, "8A" },
        { CPU_ID_CORTEXA57R0,   CPU_CLASS_CORTEX,       "Cortex-A57 r0",
diff -r 022661d54b22 -r 9c2e553466e4 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Fri Sep 15 23:08:11 2017 +0000
+++ b/sys/arch/arm/include/armreg.h     Sat Sep 16 00:47:16 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.111 2016/05/17 08:27:24 msaitoh Exp $     */
+/*     $NetBSD: armreg.h,v 1.112 2017/09/16 00:47:16 matt Exp $        */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -227,6 +227,7 @@
 #define CPU_ID_CORTEXA15R2     0x412fc0f0
 #define CPU_ID_CORTEXA15R3     0x413fc0f0
 #define CPU_ID_CORTEXA17R1     0x411fc0e0
+#define CPU_ID_CORTEXA35R0     0x410fd040
 #define CPU_ID_CORTEXA53R0     0x410fd030
 #define CPU_ID_CORTEXA57R0     0x410fd070
 #define CPU_ID_CORTEXA57R1     0x411fd070
@@ -238,6 +239,7 @@
 #define CPU_ID_CORTEX_A8_P(n)  ((n & 0xff0ff0f0) == 0x410fc080)
 #define CPU_ID_CORTEX_A9_P(n)  ((n & 0xff0ff0f0) == 0x410fc090)
 #define CPU_ID_CORTEX_A15_P(n) ((n & 0xff0ff0f0) == 0x410fc0f0)
+#define CPU_ID_CORTEX_A35_P(n) ((n & 0xff0ff0f0) == 0x410fd040)
 #define CPU_ID_CORTEX_A53_P(n) ((n & 0xff0ff0f0) == 0x410fd030)
 #define CPU_ID_CORTEX_A57_P(n) ((n & 0xff0ff0f0) == 0x410fd070)
 #define CPU_ID_CORTEX_A72_P(n) ((n & 0xff0ff0f0) == 0x410fd080)