[src/trunk]: src/sys/arch/arm/omap Add minimal definition for control module ...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/65594d5fd1da
branches:  trunk
changeset: 786510:65594d5fd1da
user:      matt <matt%NetBSD.org@localhost>
date:      Tue Apr 30 05:37:51 2013 +0000

description:
Add minimal definition for control module control status register to obtain
the base frequency used for the system clock.

diffstat:

 sys/arch/arm/omap/omap2_reg.h |  20 ++++++++++++--------
 1 files changed, 12 insertions(+), 8 deletions(-)

diffs (34 lines):

diff -r f4568905f615 -r 65594d5fd1da sys/arch/arm/omap/omap2_reg.h
--- a/sys/arch/arm/omap/omap2_reg.h     Tue Apr 30 02:28:16 2013 +0000
+++ b/sys/arch/arm/omap/omap2_reg.h     Tue Apr 30 05:37:51 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: omap2_reg.h,v 1.17 2013/04/30 00:17:24 matt Exp $ */
+/* $NetBSD: omap2_reg.h,v 1.18 2013/04/30 05:37:51 matt Exp $ */
 
 /*
  * Copyright (c) 2007 Microsoft
@@ -740,13 +740,17 @@
 #define OMAP3530_SDMA_SIZE             0x00001000      /* 4KB */
 
 #ifdef TI_AM335X
-#define        TI_AM335X_EMIF0_BASE            0x4c000000
-#define        TI_AM335X_EMIF0_SIZE            0x00100000
-#define        EMIF_SDRAM_CONFIG               8
-#define        SDRAM_CONFIG_WIDTH              __BITS(15,14)
-#define        SDRAM_CONFIG_RSIZE              __BITS(9,7)
-#define        SDRAM_CONFIG_IBANK              __BITS(6,4)
-#define        SDRAM_CONFIG_PAGESIZE           __BITS(2,0)
+#define TI_AM335X_CTLMOD_BASE          0x44e10000
+#define CTLMOD_CONTROL_STATUS          0x40
+#define CTLMOD_CONTROL_STATUS_SYSBOOT1 __BITS(23,22)
+
+#define TI_AM335X_EMIF0_BASE           0x4c000000
+#define TI_AM335X_EMIF0_SIZE           0x00100000
+#define EMIF_SDRAM_CONFIG              8
+#define SDRAM_CONFIG_WIDTH             __BITS(15,14)
+#define SDRAM_CONFIG_RSIZE             __BITS(9,7)
+#define SDRAM_CONFIG_IBANK             __BITS(6,4)
+#define SDRAM_CONFIG_PAGESIZE          __BITS(2,0)
 #endif
        
 #endif /* _ARM_OMAP_OMAP2_REG_H_ */