[src/trunk]: src/sys/dev/pci Add PCIe CRS Software Visibility bit.

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/def95e7975a3
branches:  trunk
changeset: 804110:def95e7975a3
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon Nov 24 07:53:43 2014 +0000

description:
Add PCIe CRS Software Visibility bit.

diffstat:

 sys/dev/pci/pci_subr.c |  5 +++--
 sys/dev/pci/pcireg.h   |  3 ++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diffs (43 lines):

diff -r f07da93fdada -r def95e7975a3 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c    Mon Nov 24 07:52:04 2014 +0000
+++ b/sys/dev/pci/pci_subr.c    Mon Nov 24 07:53:43 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $   */
+/*     $NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $   */
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.132 2014/10/23 13:44:37 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.133 2014/11/24 07:53:43 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -1634,6 +1634,7 @@
                /* Root Capability Register */
                printf("    Root Capability Register: %04x\n",
                    reg >> 16);
+               onoff("CRS Software Visibility", reg, PCIE_RCR_CRS_SV);
 
                /* Root Status Register */
                reg = regs[o2i(capoff + PCIE_RSR)];
diff -r f07da93fdada -r def95e7975a3 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h      Mon Nov 24 07:52:04 2014 +0000
+++ b/sys/dev/pci/pcireg.h      Mon Nov 24 07:53:43 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pcireg.h,v 1.99 2014/10/23 13:45:41 msaitoh Exp $      */
+/*     $NetBSD: pcireg.h,v 1.100 2014/11/24 07:53:43 msaitoh Exp $     */
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -976,6 +976,7 @@
 #define PCIE_RCR_SERR_FER      __BIT(2)       /* SERR on Fatal Error Enable */
 #define PCIE_RCR_PME_IE                __BIT(3)       /* PME Interrupt Enable */
 #define PCIE_RCR_CRS_SVE       __BIT(4)       /* CRS Software Visibility En */
+#define PCIE_RCR_CRS_SV                __BIT(16)      /* CRS Software Visibility */
 #define PCIE_RSR       0x20    /* Root Status Register */
 #define PCIE_RSR_PME_REQESTER  __BITS(15, 0)  /* PME Requester ID */
 #define PCIE_RSR_PME_STAT      __BIT(16)      /* PME Status */