[src/trunk]: src/sys/arch/x86/x86 Fix calculation of the cpu model (display m...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cd2d7c992c68
branches:  trunk
changeset: 791299:cd2d7c992c68
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue Nov 12 15:58:38 2013 +0000

description:
Fix calculation of the cpu model (display model) in coretemp_tjmax().
The CPUID2MODEL() macro returns only low 4bit, so the checking against 0x17
doesn't work correctly. The correct way is to use the display model.
Remove incorrect extmodel check. Same as FreeBSD.

diffstat:

 sys/arch/x86/x86/coretemp.c |  14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diffs (52 lines):

diff -r eed15ba6206a -r cd2d7c992c68 sys/arch/x86/x86/coretemp.c
--- a/sys/arch/x86/x86/coretemp.c       Tue Nov 12 15:13:14 2013 +0000
+++ b/sys/arch/x86/x86/coretemp.c       Tue Nov 12 15:58:38 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.29 2012/08/14 14:36:43 jruoho Exp $ */
+/* $NetBSD: coretemp.c,v 1.30 2013/11/12 15:58:38 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.29 2012/08/14 14:36:43 jruoho Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.30 2013/11/12 15:58:38 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -256,11 +256,13 @@
 {
        struct coretemp_softc *sc = device_private(self);
        struct cpu_info *ci = sc->sc_ci;
-       uint32_t extmodel, model, stepping;
+       uint32_t family, model, stepping;
        uint64_t msr;
 
+       family = CPUID2FAMILY(ci->ci_signature);
        model = CPUID2MODEL(ci->ci_signature);
-       extmodel = CPUID2EXTMODEL(ci->ci_signature);
+       if ((family == 0xf) || (family == 0x6))
+               model |= CPUID2EXTMODEL(ci->ci_signature) << 4;
        stepping = CPUID2STEPPING(ci->ci_signature);
 
        sc->sc_tjmax = 100;
@@ -279,7 +281,7 @@
         * that MSR_IA32_EXT_CONFIG is not safe on all CPUs.
         */
        if ((model == 0x0F && stepping >= 2) ||
-           (model == 0x0E && extmodel != 1)) {
+           (model == 0x0E)) {
 
                if (rdmsr_safe(MSR_IA32_EXT_CONFIG, &msr) == EFAULT)
                        return;
@@ -295,7 +297,7 @@
         * but only consider the interval [70, 100] C as valid.
         * It is not fully known which CPU models have the MSR.
         */
-       if (model == 0x0E && extmodel != 0) {
+       if (model == 0x0E) {
 
                if (rdmsr_safe(MSR_TEMPERATURE_TARGET, &msr) == EFAULT)
                        return;