Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev/pci Add support for BCM5825, and BCM5860, 5861, 5862...



details:   https://anonhg.NetBSD.org/src/rev/ff21f5ddc5cf
branches:  trunk
changeset: 791427:ff21f5ddc5cf
user:      bad <bad%NetBSD.org@localhost>
date:      Sun Nov 17 23:20:18 2013 +0000

description:
Add support for BCM5825, and BCM5860, 5861, 5862 from OpenBSD rev 1.143:
  Add support for the BCM5825 and the next-generation BCM5860, 5861,
  5862 Broadcom CryptoNetX IPSec/SSL Security Processors.  The 5825 is a
  faster version of the already supported 5823, and the even faster 586x
  series is a bit different and needed some more changes.

AES support hasn't been pulled in yet.

diffstat:

 sys/dev/pci/ubsec.c    |  212 +++++++++++++++++++++++++++++++++++++++++++-----
 sys/dev/pci/ubsecreg.h |   21 ++++-
 sys/dev/pci/ubsecvar.h |   15 +++-
 3 files changed, 220 insertions(+), 28 deletions(-)

diffs (truncated from 540 to 300 lines):

diff -r 750104be24a0 -r ff21f5ddc5cf sys/dev/pci/ubsec.c
--- a/sys/dev/pci/ubsec.c       Sun Nov 17 22:52:14 2013 +0000
+++ b/sys/dev/pci/ubsec.c       Sun Nov 17 23:20:18 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ubsec.c,v 1.33 2013/11/17 22:52:14 bad Exp $   */
+/*     $NetBSD: ubsec.c,v 1.34 2013/11/17 23:20:18 bad Exp $   */
 /* $FreeBSD: src/sys/dev/ubsec/ubsec.c,v 1.6.2.6 2003/01/23 21:06:43 sam Exp $ */
 /*     $OpenBSD: ubsec.c,v 1.127 2003/06/04 14:04:58 jason Exp $       */
 
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ubsec.c,v 1.33 2013/11/17 22:52:14 bad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ubsec.c,v 1.34 2013/11/17 23:20:18 bad Exp $");
 
 #undef UBSEC_DEBUG
 
@@ -122,6 +122,7 @@
 static void    ubsec_mcopy(struct mbuf *, struct mbuf *, int, int);
 static void    ubsec_callback2(struct ubsec_softc *, struct ubsec_q2 *);
 static void    ubsec_feed2(struct ubsec_softc *);
+static void    ubsec_feed4(struct ubsec_softc *);
 #ifndef UBSEC_NO_RNG
 static  void   ubsec_rng(void *);
 static  void   ubsec_rng_locked(void *);
@@ -188,34 +189,40 @@
        pci_product_id_t        ubsec_product;
        int                     ubsec_flags;
        int                     ubsec_statmask;
+       int                     ubsec_maxaggr;
        const char              *ubsec_name;
 } ubsec_products[] = {
        { PCI_VENDOR_BLUESTEEL, PCI_PRODUCT_BLUESTEEL_5501,
          0,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Bluesteel 5501"
        },
        { PCI_VENDOR_BLUESTEEL, PCI_PRODUCT_BLUESTEEL_5601,
          UBS_FLAGS_KEY | UBS_FLAGS_RNG,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Bluesteel 5601"
        },
 
        { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5801,
          0,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Broadcom BCM5801"
        },
 
        { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5802,
          UBS_FLAGS_KEY | UBS_FLAGS_RNG,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Broadcom BCM5802"
        },
 
        { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5805,
          UBS_FLAGS_KEY | UBS_FLAGS_RNG,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Broadcom BCM5805"
        },
 
@@ -223,6 +230,7 @@
          UBS_FLAGS_KEY | UBS_FLAGS_RNG | UBS_FLAGS_LONGCTX |
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR,
+         UBS_MIN_AGGR,
          "Broadcom BCM5820"
        },
 
@@ -231,6 +239,7 @@
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
              BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
          "Broadcom BCM5821"
        },
        { PCI_VENDOR_SUN,       PCI_PRODUCT_SUN_SCA1K,
@@ -238,6 +247,7 @@
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
              BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
          "Sun Crypto Accelerator 1000"
        },
        { PCI_VENDOR_SUN,       PCI_PRODUCT_SUN_5821,
@@ -245,6 +255,7 @@
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
              BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
          "Broadcom BCM5821 (Sun)"
        },
 
@@ -253,6 +264,7 @@
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
              BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
          "Broadcom BCM5822"
        },
 
@@ -261,12 +273,59 @@
              UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
          BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
              BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
          "Broadcom BCM5823"
        },
 
+       { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5825,
+         UBS_FLAGS_KEY | UBS_FLAGS_RNG | UBS_FLAGS_LONGCTX |
+             UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY,
+         BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
+             BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY,
+         UBS_MIN_AGGR,
+         "Broadcom BCM5825"
+       },
+
+       { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5860,
+         UBS_FLAGS_MULTIMCR | UBS_FLAGS_HWNORM |
+             UBS_FLAGS_LONGCTX |
+             UBS_FLAGS_RNG | UBS_FLAGS_RNG4 |
+             UBS_FLAGS_KEY | UBS_FLAGS_BIGKEY,
+         BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
+             BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY |
+             BS_STAT_MCR3_ALLEMPTY | BS_STAT_MCR4_ALLEMPTY,
+         UBS_MAX_AGGR,
+         "Broadcom BCM5860"
+       },
+
+       { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5861,
+         UBS_FLAGS_MULTIMCR | UBS_FLAGS_HWNORM |
+             UBS_FLAGS_LONGCTX |
+             UBS_FLAGS_RNG | UBS_FLAGS_RNG4 |
+             UBS_FLAGS_KEY | UBS_FLAGS_BIGKEY,
+         BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
+             BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY |
+             BS_STAT_MCR3_ALLEMPTY | BS_STAT_MCR4_ALLEMPTY,
+         UBS_MAX_AGGR,
+         "Broadcom BCM5861"
+       },
+
+       { PCI_VENDOR_BROADCOM,  PCI_PRODUCT_BROADCOM_5862,
+         UBS_FLAGS_MULTIMCR | UBS_FLAGS_HWNORM |
+             UBS_FLAGS_LONGCTX |
+             UBS_FLAGS_RNG | UBS_FLAGS_RNG4 |
+             UBS_FLAGS_KEY | UBS_FLAGS_BIGKEY,
+         BS_STAT_MCR1_DONE | BS_STAT_DMAERR |
+             BS_STAT_MCR1_ALLEMPTY | BS_STAT_MCR2_ALLEMPTY |
+             BS_STAT_MCR3_ALLEMPTY | BS_STAT_MCR4_ALLEMPTY,
+         UBS_MAX_AGGR,
+         "Broadcom BCM5862"
+       },
+
        { 0,                    0,
          0,
          0,
+         0,
          NULL
        }
 };
@@ -304,6 +363,7 @@
        pci_chipset_tag_t pc = pa->pa_pc;
        pci_intr_handle_t ih;
        const char *intrstr = NULL;
+       pcireg_t memtype;
        struct ubsec_dma *dmap;
        u_int32_t cmd, i;
 
@@ -322,16 +382,20 @@
        SIMPLEQ_INIT(&sc->sc_qchip);
        SIMPLEQ_INIT(&sc->sc_queue2);
        SIMPLEQ_INIT(&sc->sc_qchip2);
+       SIMPLEQ_INIT(&sc->sc_queue4);
+       SIMPLEQ_INIT(&sc->sc_qchip4);
        SIMPLEQ_INIT(&sc->sc_q2free);
 
        sc->sc_flags = up->ubsec_flags;
        sc->sc_statmask = up->ubsec_statmask;
+       sc->sc_maxaggr = up->ubsec_maxaggr;
 
        cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
        cmd |= PCI_COMMAND_MASTER_ENABLE;
        pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, cmd);
 
-       if (pci_mapreg_map(pa, BS_BAR, PCI_MAPREG_TYPE_MEM, 0,
+       memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, BS_BAR);
+       if (pci_mapreg_map(pa, BS_BAR, memtype, 0,
            &sc->sc_st, &sc->sc_sh, NULL, &sc->sc_memsize)) {
                aprint_error_dev(self, "can't find mem space");
                return;
@@ -416,7 +480,10 @@
 
 #ifndef UBSEC_NO_RNG
        if (sc->sc_flags & UBS_FLAGS_RNG) {
-               sc->sc_statmask |= BS_STAT_MCR2_DONE;
+               if (sc->sc_flags & UBS_FLAGS_RNG4)
+                       sc->sc_statmask |= BS_STAT_MCR4_DONE;
+               else
+                       sc->sc_statmask |= BS_STAT_MCR2_DONE;
 
                if (ubsec_dma_malloc(sc, sizeof(struct ubsec_mcr),
                    &sc->sc_rng.rng_q.q_mcr, 0))
@@ -596,6 +663,7 @@
        volatile u_int32_t stat;
        struct ubsec_q *q;
        struct ubsec_dma *dmap;
+       int flags;
        int npkts = 0, i;
 
        mutex_spin_enter(&sc->sc_mtx);
@@ -662,7 +730,13 @@
                            BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 
                        mcr = (struct ubsec_mcr *)q2->q_mcr.dma_vaddr;
-                       if ((mcr->mcr_flags & htole16(UBS_MCR_DONE)) == 0) {
+
+                       /* A bug in new devices requires to swap this field */
+                       if (sc->sc_flags & UBS_FLAGS_MULTIMCR)
+                               flags = htole16(mcr->mcr_flags);
+                       else
+                               flags = mcr->mcr_flags;
+                       if ((flags & htole16(UBS_MCR_DONE)) == 0) {
                                bus_dmamap_sync(sc->sc_dmat,
                                    q2->q_mcr.dma_map, 0,
                                    q2->q_mcr.dma_map->dm_mapsize,
@@ -680,6 +754,39 @@
                                ubsec_feed2(sc);
                }
        }
+       if ((sc->sc_flags & UBS_FLAGS_RNG4) && (stat & BS_STAT_MCR4_DONE)) {
+               struct ubsec_q2 *q2;
+               struct ubsec_mcr *mcr;
+
+               while (!SIMPLEQ_EMPTY(&sc->sc_qchip4)) {
+                       q2 = SIMPLEQ_FIRST(&sc->sc_qchip4);
+
+                       bus_dmamap_sync(sc->sc_dmat, q2->q_mcr.dma_map,
+                           0, q2->q_mcr.dma_map->dm_mapsize,
+                           BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+
+                       mcr = (struct ubsec_mcr *)q2->q_mcr.dma_vaddr;
+
+                       /* A bug in new devices requires to swap this field */
+                       flags = htole16(mcr->mcr_flags);
+
+                       if ((flags & htole16(UBS_MCR_DONE)) == 0) {
+                               bus_dmamap_sync(sc->sc_dmat,
+                                   q2->q_mcr.dma_map, 0,
+                                   q2->q_mcr.dma_map->dm_mapsize,
+                                   BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+                               break;
+                       }
+                       SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip4, q_next);
+                       ubsec_callback2(sc, q2);
+                       /*
+                        * Don't send any more packet to chip if there has been
+                        * a DMAERR.
+                        */
+                       if (!(stat & BS_STAT_DMAERR))
+                               ubsec_feed4(sc);
+               }
+       }
 
        /*
         * Check to see if we got any DMA Error
@@ -747,8 +854,8 @@
         * completed ops as we only get an interrupt when all aggregated
         * ops have completed.
         */
-       if (npkts > UBS_MAX_AGGR)
-               npkts = UBS_MAX_AGGR;
+       if (npkts > sc->sc_maxaggr)
+               npkts = sc->sc_maxaggr;
        if (npkts > ubsec_maxaggr)
                npkts = ubsec_maxaggr;
        if (npkts > ubsecstats.hst_maxbatch)
@@ -1737,6 +1844,33 @@
 }
 
 /*
+ * feed the RNG (used instead of ubsec_feed2() on 5827+ devices)
+ */
+void
+ubsec_feed4(struct ubsec_softc *sc)
+{
+       struct ubsec_q2 *q;
+
+       while (!SIMPLEQ_EMPTY(&sc->sc_queue4)) {
+               if (READ_REG(sc, BS_STAT) & BS_STAT_MCR4_FULL)
+                       break;
+               q = SIMPLEQ_FIRST(&sc->sc_queue4);
+
+               bus_dmamap_sync(sc->sc_dmat, q->q_mcr.dma_map, 0,



Home | Main Index | Thread Index | Old Index