Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev/pci Wait for the bootcode to complete initialization...



details:   https://anonhg.NetBSD.org/src/rev/349c510abae1
branches:  trunk
changeset: 785578:349c510abae1
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Mar 21 12:56:03 2013 +0000

description:
Wait for the bootcode to complete initialization for 5717 and newer devices.
See BCM5718 programmer's guide's "step 13, Device reset Procedure, Section 7".
57781's document has the same note.

I verified the loop really looped on those chips.

But, I don't know why tg3 doesn't it.

diffstat:

 sys/dev/pci/if_bge.c    |  18 ++++++++++++++++--
 sys/dev/pci/if_bgereg.h |   3 ++-
 2 files changed, 18 insertions(+), 3 deletions(-)

diffs (56 lines):

diff -r de9640eb5fbe -r 349c510abae1 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Thu Mar 21 12:47:16 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Thu Mar 21 12:56:03 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.222 2013/03/21 12:33:11 msaitoh Exp $     */
+/*     $NetBSD: if_bge.c,v 1.223 2013/03/21 12:56:03 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.222 2013/03/21 12:33:11 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.223 2013/03/21 12:56:03 msaitoh Exp $");
 
 #include "vlan.h"
 
@@ -3992,6 +3992,20 @@
        /* Step 28: Fix up byte swapping */
        CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS);
 
+       /*
+        * Wait for the bootcode to complete initialization.
+        * See BCM5718 programmer's guide's "step 13, Device reset Procedure,
+        * Section 7".
+        */
+       if (BGE_IS_5717_PLUS(sc)) {
+               for (i = 0; i < 1000*1000; i++) {
+                       val = bge_readmem_ind(sc, BGE_SRAM_FW_MB);
+                       if (val == BGE_SRAM_FW_MB_RESET_MAGIC)
+                               break;
+                       DELAY(10);
+               }
+       }
+
        /* Step 21: 5822 B0 errata */
        if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5704_BX) {
                pcireg_t msidata;
diff -r de9640eb5fbe -r 349c510abae1 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h   Thu Mar 21 12:47:16 2013 +0000
+++ b/sys/dev/pci/if_bgereg.h   Thu Mar 21 12:56:03 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bgereg.h,v 1.67 2013/03/21 12:33:11 msaitoh Exp $   */
+/*     $NetBSD: if_bgereg.h,v 1.68 2013/03/21 12:56:03 msaitoh Exp $   */
 /*
  * Copyright (c) 2001 Wind River Systems
  * Copyright (c) 1997, 1998, 1999, 2001
@@ -2178,6 +2178,7 @@
  * code from running.
  */
 #define        BGE_SRAM_FW_MB_MAGIC    0x4B657654
+#define        BGE_SRAM_FW_MB_RESET_MAGIC      0xB49A89AB
 
 typedef struct {
        volatile u_int32_t      bge_addr_hi;



Home | Main Index | Thread Index | Old Index