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[src/trunk]: src/sys/dev/pci No functional change.



details:   https://anonhg.NetBSD.org/src/rev/8d56a868904e
branches:  trunk
changeset: 797018:8d56a868904e
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue Jul 01 15:23:35 2014 +0000

description:
No functional change.
- s/u_int/uint/
- Modify comment a bit (sync with OpenBSD)

diffstat:

 sys/dev/pci/if_bnx.c    |  356 ++++++++++++++++++++--------------------
 sys/dev/pci/if_bnxreg.h |  418 ++++++++++++++++++++++++------------------------
 sys/dev/pci/if_bnxvar.h |  274 +++++++++++++++---------------
 3 files changed, 524 insertions(+), 524 deletions(-)

diffs (truncated from 1976 to 300 lines):

diff -r 18d710ecedb7 -r 8d56a868904e sys/dev/pci/if_bnx.c
--- a/sys/dev/pci/if_bnx.c      Tue Jul 01 15:03:58 2014 +0000
+++ b/sys/dev/pci/if_bnx.c      Tue Jul 01 15:23:35 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bnx.c,v 1.54 2014/06/24 23:25:33 msaitoh Exp $      */
+/*     $NetBSD: if_bnx.c,v 1.55 2014/07/01 15:23:35 msaitoh Exp $      */
 /*     $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
 
 /*-
@@ -35,7 +35,7 @@
 #if 0
 __FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
 #endif
-__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.54 2014/06/24 23:25:33 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.55 2014/07/01 15:23:35 msaitoh Exp $");
 
 /*
  * The following controllers are supported by this driver:
@@ -73,7 +73,7 @@
 /* BNX Debug Options                                                        */
 /****************************************************************************/
 #ifdef BNX_DEBUG
-       u_int32_t bnx_debug = /*BNX_WARN*/ BNX_VERBOSE_SEND;
+       uint32_t bnx_debug = /*BNX_WARN*/ BNX_VERBOSE_SEND;
 
        /*          0 = Never              */
        /*          1 = 1 in 2,147,483,648 */
@@ -313,9 +313,9 @@
 /****************************************************************************/
 /* BNX Register/Memory Access Routines                                      */
 /****************************************************************************/
-u_int32_t      bnx_reg_rd_ind(struct bnx_softc *, u_int32_t);
-void   bnx_reg_wr_ind(struct bnx_softc *, u_int32_t, u_int32_t);
-void   bnx_ctx_wr(struct bnx_softc *, u_int32_t, u_int32_t, u_int32_t);
+uint32_t       bnx_reg_rd_ind(struct bnx_softc *, uint32_t);
+void   bnx_reg_wr_ind(struct bnx_softc *, uint32_t, uint32_t);
+void   bnx_ctx_wr(struct bnx_softc *, uint32_t, uint32_t, uint32_t);
 int    bnx_miibus_read_reg(device_t, int, int);
 void   bnx_miibus_write_reg(device_t, int, int, int);
 void   bnx_miibus_statchg(struct ifnet *);
@@ -327,18 +327,18 @@
 int    bnx_release_nvram_lock(struct bnx_softc *);
 void   bnx_enable_nvram_access(struct bnx_softc *);
 void   bnx_disable_nvram_access(struct bnx_softc *);
-int    bnx_nvram_read_dword(struct bnx_softc *, u_int32_t, u_int8_t *,
-           u_int32_t);
+int    bnx_nvram_read_dword(struct bnx_softc *, uint32_t, uint8_t *,
+           uint32_t);
 int    bnx_init_nvram(struct bnx_softc *);
-int    bnx_nvram_read(struct bnx_softc *, u_int32_t, u_int8_t *, int);
+int    bnx_nvram_read(struct bnx_softc *, uint32_t, uint8_t *, int);
 int    bnx_nvram_test(struct bnx_softc *);
 #ifdef BNX_NVRAM_WRITE_SUPPORT
 int    bnx_enable_nvram_write(struct bnx_softc *);
 void   bnx_disable_nvram_write(struct bnx_softc *);
-int    bnx_nvram_erase_page(struct bnx_softc *, u_int32_t);
-int    bnx_nvram_write_dword(struct bnx_softc *, u_int32_t, u_int8_t *,
-           u_int32_t);
-int    bnx_nvram_write(struct bnx_softc *, u_int32_t, u_int8_t *, int);
+int    bnx_nvram_erase_page(struct bnx_softc *, uint32_t);
+int    bnx_nvram_write_dword(struct bnx_softc *, uint32_t, uint8_t *,
+           uint32_t);
+int    bnx_nvram_write(struct bnx_softc *, uint32_t, uint8_t *, int);
 #endif
 
 /****************************************************************************/
@@ -353,20 +353,20 @@
 /****************************************************************************/
 /* BNX Firmware Synchronization and Load                                    */
 /****************************************************************************/
-int    bnx_fw_sync(struct bnx_softc *, u_int32_t);
-void   bnx_load_rv2p_fw(struct bnx_softc *, u_int32_t *, u_int32_t,
-           u_int32_t);
+int    bnx_fw_sync(struct bnx_softc *, uint32_t);
+void   bnx_load_rv2p_fw(struct bnx_softc *, uint32_t *, uint32_t,
+           uint32_t);
 void   bnx_load_cpu_fw(struct bnx_softc *, struct cpu_reg *,
            struct fw_info *);
 void   bnx_init_cpus(struct bnx_softc *);
 
 void   bnx_stop(struct ifnet *, int);
-int    bnx_reset(struct bnx_softc *, u_int32_t);
+int    bnx_reset(struct bnx_softc *, uint32_t);
 int    bnx_chipinit(struct bnx_softc *);
 int    bnx_blockinit(struct bnx_softc *);
-static int     bnx_add_buf(struct bnx_softc *, struct mbuf *, u_int16_t *,
-           u_int16_t *, u_int32_t *);
-int    bnx_get_buf(struct bnx_softc *, u_int16_t *, u_int16_t *, u_int32_t *);
+static int     bnx_add_buf(struct bnx_softc *, struct mbuf *, uint16_t *,
+           uint16_t *, uint32_t *);
+int    bnx_get_buf(struct bnx_softc *, uint16_t *, uint16_t *, uint32_t *);
 
 int    bnx_init_tx_chain(struct bnx_softc *);
 void   bnx_init_tx_context(struct bnx_softc *);
@@ -464,9 +464,9 @@
        pci_chipset_tag_t       pc = pa->pa_pc;
        pci_intr_handle_t       ih;
        const char              *intrstr = NULL;
-       u_int32_t               command;
+       uint32_t                command;
        struct ifnet            *ifp;
-       u_int32_t               val;
+       uint32_t                val;
        int                     mii_flags = MIIF_FORCEANEG;
        pcireg_t                memtype;
        char intrbuf[PCI_INTRSTR_LEN];
@@ -555,7 +555,7 @@
        /* Get PCI bus information (speed and type). */
        val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);
        if (val & BNX_PCICFG_MISC_STATUS_PCIX_DET) {
-               u_int32_t clkreg;
+               uint32_t clkreg;
 
                sc->bnx_flags |= BNX_PCIX_FLAG;
 
@@ -831,8 +831,8 @@
 /* Returns:                                                                 */
 /*   The value of the register.                                             */
 /****************************************************************************/
-u_int32_t
-bnx_reg_rd_ind(struct bnx_softc *sc, u_int32_t offset)
+uint32_t
+bnx_reg_rd_ind(struct bnx_softc *sc, uint32_t offset)
 {
        struct pci_attach_args  *pa = &(sc->bnx_pa);
 
@@ -840,7 +840,7 @@
            offset);
 #ifdef BNX_DEBUG
        {
-               u_int32_t val;
+               uint32_t val;
                val = pci_conf_read(pa->pa_pc, pa->pa_tag,
                    BNX_PCICFG_REG_WINDOW);
                DBPRINT(sc, BNX_EXCESSIVE, "%s(); offset = 0x%08X, "
@@ -863,7 +863,7 @@
 /*   Nothing.                                                               */
 /****************************************************************************/
 void
-bnx_reg_wr_ind(struct bnx_softc *sc, u_int32_t offset, u_int32_t val)
+bnx_reg_wr_ind(struct bnx_softc *sc, uint32_t offset, uint32_t val)
 {
        struct pci_attach_args  *pa = &(sc->bnx_pa);
 
@@ -885,11 +885,11 @@
 /*   Nothing.                                                               */
 /****************************************************************************/
 void
-bnx_ctx_wr(struct bnx_softc *sc, u_int32_t cid_addr, u_int32_t ctx_offset,
-    u_int32_t ctx_val)
+bnx_ctx_wr(struct bnx_softc *sc, uint32_t cid_addr, uint32_t ctx_offset,
+    uint32_t ctx_val)
 {
-       u_int32_t idx, offset = ctx_offset + cid_addr;
-       u_int32_t val, retry_cnt = 5;
+       uint32_t idx, offset = ctx_offset + cid_addr;
+       uint32_t val, retry_cnt = 5;
 
        if (BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5709) {
                REG_WR(sc, BNX_CTX_CTX_DATA, ctx_val);
@@ -928,7 +928,7 @@
 bnx_miibus_read_reg(device_t dev, int phy, int reg)
 {
        struct bnx_softc        *sc = device_private(dev);
-       u_int32_t               val;
+       uint32_t                val;
        int                     i;
 
        /* Make sure we are accessing the correct PHY address. */
@@ -986,7 +986,7 @@
 
        DBPRINT(sc, BNX_EXCESSIVE,
            "%s(): phy = %d, reg = 0x%04X, val = 0x%04X\n", __func__, phy,
-           (u_int16_t) reg & 0xffff, (u_int16_t) val & 0xffff);
+           (uint16_t) reg & 0xffff, (uint16_t) val & 0xffff);
 
        if (sc->bnx_phy_flags & BNX_PHY_INT_MODE_AUTO_POLLING_FLAG) {
                val = REG_RD(sc, BNX_EMAC_MDIO_MODE);
@@ -1013,7 +1013,7 @@
 bnx_miibus_write_reg(device_t dev, int phy, int reg, int val)
 {
        struct bnx_softc        *sc = device_private(dev);
-       u_int32_t               val1;
+       uint32_t                val1;
        int                     i;
 
        /* Make sure we are accessing the correct PHY address. */
@@ -1025,7 +1025,7 @@
 
        DBPRINT(sc, BNX_EXCESSIVE, "%s(): phy = %d, reg = 0x%04X, "
            "val = 0x%04X\n", __func__,
-           phy, (u_int16_t) reg & 0xffff, (u_int16_t) val & 0xffff);
+           phy, (uint16_t) reg & 0xffff, (uint16_t) val & 0xffff);
 
        /*
         * The BCM5709S PHY is an IEEE Clause 45 PHY
@@ -1154,7 +1154,7 @@
 int
 bnx_acquire_nvram_lock(struct bnx_softc *sc)
 {
-       u_int32_t               val;
+       uint32_t                val;
        int                     j;
 
        DBPRINT(sc, BNX_VERBOSE, "Acquiring NVRAM lock.\n");
@@ -1191,7 +1191,7 @@
 bnx_release_nvram_lock(struct bnx_softc *sc)
 {
        int                     j;
-       u_int32_t               val;
+       uint32_t                val;
 
        DBPRINT(sc, BNX_VERBOSE, "Releasing NVRAM lock.\n");
 
@@ -1226,7 +1226,7 @@
 int
 bnx_enable_nvram_write(struct bnx_softc *sc)
 {
-       u_int32_t               val;
+       uint32_t                val;
 
        DBPRINT(sc, BNX_VERBOSE, "Enabling NVRAM write.\n");
 
@@ -1269,7 +1269,7 @@
 void
 bnx_disable_nvram_write(struct bnx_softc *sc)
 {
-       u_int32_t               val;
+       uint32_t                val;
 
        DBPRINT(sc, BNX_VERBOSE,  "Disabling NVRAM write.\n");
 
@@ -1290,7 +1290,7 @@
 void
 bnx_enable_nvram_access(struct bnx_softc *sc)
 {
-       u_int32_t               val;
+       uint32_t                val;
 
        DBPRINT(sc, BNX_VERBOSE, "Enabling NVRAM access.\n");
 
@@ -1311,7 +1311,7 @@
 void
 bnx_disable_nvram_access(struct bnx_softc *sc)
 {
-       u_int32_t               val;
+       uint32_t                val;
 
        DBPRINT(sc, BNX_VERBOSE, "Disabling NVRAM access.\n");
 
@@ -1333,9 +1333,9 @@
 /*   0 on success, positive value on failure.                               */
 /****************************************************************************/
 int
-bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
+bnx_nvram_erase_page(struct bnx_softc *sc, uint32_t offset)
 {
-       u_int32_t               cmd;
+       uint32_t                cmd;
        int                     j;
 
        /* Buffered flash doesn't require an erase. */
@@ -1358,7 +1358,7 @@
 
        /* Wait for completion. */
        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
-               u_int32_t val;
+               uint32_t val;
 
                DELAY(5);
 
@@ -1386,10 +1386,10 @@
 /*   0 on success and the 32 bit value read, positive value on failure.     */
 /****************************************************************************/
 int
-bnx_nvram_read_dword(struct bnx_softc *sc, u_int32_t offset,
-    u_int8_t *ret_val, u_int32_t cmd_flags)
+bnx_nvram_read_dword(struct bnx_softc *sc, uint32_t offset,
+    uint8_t *ret_val, uint32_t cmd_flags)
 {
-       u_int32_t               cmd;
+       uint32_t                cmd;
        int                     i, rc = 0;
 
        /* Build the command word. */
@@ -1412,7 +1412,7 @@
 
        /* Wait for completion. */
        for (i = 0; i < NVRAM_TIMEOUT_COUNT; i++) {
-               u_int32_t val;
+               uint32_t val;
 
                DELAY(5);
 
@@ -1448,10 +1448,10 @@
 /*   0 on success, positive value on failure.                               */
 /****************************************************************************/
 int
-bnx_nvram_write_dword(struct bnx_softc *sc, u_int32_t offset, u_int8_t *val,
-    u_int32_t cmd_flags)



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