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[src/trunk]: src/sys/dev/pci Print NVM image version.
details: https://anonhg.NetBSD.org/src/rev/c94940eda49c
branches: trunk
changeset: 808862:c94940eda49c
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Sat Jun 06 03:33:37 2015 +0000
description:
Print NVM image version.
diffstat:
sys/dev/pci/if_wm.c | 597 ++++++++++++++++++++++++++++++++++++++++++++++--
sys/dev/pci/if_wmreg.h | 37 ++-
sys/dev/pci/if_wmvar.h | 5 +-
3 files changed, 608 insertions(+), 31 deletions(-)
diffs (truncated from 1025 to 300 lines):
diff -r 1b738dc1ba7c -r c94940eda49c sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c Fri Jun 05 20:41:46 2015 +0000
+++ b/sys/dev/pci/if_wm.c Sat Jun 06 03:33:37 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.325 2015/06/02 14:19:26 msaitoh Exp $ */
+/* $NetBSD: if_wm.c,v 1.326 2015/06/06 03:33:37 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -81,7 +81,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.325 2015/06/02 14:19:26 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.326 2015/06/06 03:33:37 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
@@ -135,6 +135,8 @@
#include <dev/pci/if_wmreg.h>
#include <dev/pci/if_wmvar.h>
+// #define WM_DEBUG 1
+
#ifdef WM_DEBUG
#define WM_DEBUG_LINK 0x01
#define WM_DEBUG_TX 0x02
@@ -142,8 +144,12 @@
#define WM_DEBUG_GMII 0x08
#define WM_DEBUG_MANAGE 0x10
#define WM_DEBUG_NVM 0x20
+#if 0
int wm_debug = WM_DEBUG_TX | WM_DEBUG_RX | WM_DEBUG_LINK | WM_DEBUG_GMII
| WM_DEBUG_MANAGE | WM_DEBUG_NVM;
+#else
+int wm_debug = WM_DEBUG_LINK;
+#endif
#define DPRINTF(x, y) if (wm_debug & (x)) printf y
#else
@@ -299,8 +305,10 @@
callout_t sc_tick_ch; /* tick callout */
bool sc_stopping;
+ int sc_nvm_ver_major;
+ int sc_nvm_ver_minor;
int sc_nvm_addrbits; /* NVM address bits */
- unsigned int sc_nvm_wordsize; /* NVM word size */
+ unsigned int sc_nvm_wordsize; /* NVM word size */
int sc_ich8_flash_base;
int sc_ich8_flash_bank_size;
int sc_nvm_k1_enabled;
@@ -626,6 +634,8 @@
static void wm_gmii_hv_writereg(device_t, int, int, int);
static int wm_gmii_82580_readreg(device_t, int, int);
static void wm_gmii_82580_writereg(device_t, int, int, int);
+static int wm_gmii_gs40g_readreg(device_t, int, int);
+static void wm_gmii_gs40g_writereg(device_t, int, int, int);
static void wm_gmii_statchg(struct ifnet *);
static int wm_kmrn_readreg(struct wm_softc *, int);
static void wm_kmrn_writereg(struct wm_softc *, int, int);
@@ -677,12 +687,13 @@
/* iNVM */
static int wm_nvm_read_word_invm(struct wm_softc *, uint16_t, uint16_t *);
static int wm_nvm_read_invm(struct wm_softc *, int, int, uint16_t *);
-/* Lock, detecting NVM type, validate checksum and read */
+/* Lock, detecting NVM type, validate checksum, version and read */
static int wm_nvm_acquire(struct wm_softc *);
static void wm_nvm_release(struct wm_softc *);
static int wm_nvm_is_onboard_eeprom(struct wm_softc *);
static int wm_nvm_get_flash_presence_i210(struct wm_softc *);
static int wm_nvm_validate_checksum(struct wm_softc *);
+static void wm_nvm_version(struct wm_softc *);
static int wm_nvm_read(struct wm_softc *, int, int, uint16_t *);
/*
@@ -736,6 +747,10 @@
static void wm_configure_k1_ich8lan(struct wm_softc *, int);
static void wm_reset_init_script_82575(struct wm_softc *);
static void wm_reset_mdicnfg_82580(struct wm_softc *);
+static void wm_pll_workaround_i210(struct wm_softc *);
+#ifdef WM_DEBUG
+static void wm_regdump(struct wm_softc *);
+#endif
CFATTACH_DECL3_NEW(wm, sizeof(struct wm_softc),
wm_match, wm_attach, wm_detach, NULL, NULL, NULL, DVF_DETACH_SHUTDOWN);
@@ -1741,6 +1756,15 @@
|| (sc->sc_type == WM_T_PCH_LPT))
wm_smbustopci(sc);
+#ifdef WM_DEBUG
+ wm_regdump(sc);
+#endif
+
+ printf("%s: SC_CTRL(0) = %08x (%s)\n", device_xname(sc->sc_dev),
+ sc->sc_ctrl, __func__);
+ sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
+ printf("%s: SC_CTRL(1) = %08x (%s)\n", device_xname(sc->sc_dev),
+ sc->sc_ctrl, __func__);
/* Reset the chip to a known state. */
wm_reset(sc);
@@ -1917,25 +1941,45 @@
prop_dictionary_set_uint32(dict, "macflags", sc->sc_flags);
if (sc->sc_flags & WM_F_EEPROM_INVALID)
- aprint_verbose_dev(sc->sc_dev, "No EEPROM\n");
+ aprint_verbose_dev(sc->sc_dev, "No EEPROM");
else {
aprint_verbose_dev(sc->sc_dev, "%u words ",
sc->sc_nvm_wordsize);
if (sc->sc_flags & WM_F_EEPROM_INVM)
- aprint_verbose("iNVM\n");
+ aprint_verbose("iNVM");
else if (sc->sc_flags & WM_F_EEPROM_FLASH_HW)
- aprint_verbose("FLASH(HW)\n");
+ aprint_verbose("FLASH(HW)");
else if (sc->sc_flags & WM_F_EEPROM_FLASH)
- aprint_verbose("FLASH\n");
+ aprint_verbose("FLASH");
else {
if (sc->sc_flags & WM_F_EEPROM_SPI)
eetype = "SPI";
else
eetype = "MicroWire";
- aprint_verbose("(%d address bits) %s EEPROM\n",
+ aprint_verbose("(%d address bits) %s EEPROM",
sc->sc_nvm_addrbits, eetype);
}
}
+ wm_nvm_version(sc);
+ aprint_verbose("\n");
+
+ if (sc->sc_type == WM_T_I210)
+ sc->sc_flags |= WM_F_PLL_WA_I210;
+ if ((sc->sc_type == WM_T_I210) && wm_nvm_get_flash_presence_i210(sc)) {
+ /* NVM image release 3.25 has a workaround */
+ if ((sc->sc_nvm_ver_major > 3)
+ || ((sc->sc_nvm_ver_major == 3)
+ && (sc->sc_nvm_ver_minor >= 25)))
+ return;
+ else {
+ aprint_verbose_dev(sc->sc_dev,
+ "ROM image version %d.%d is older than 3.25\n",
+ sc->sc_nvm_ver_major, sc->sc_nvm_ver_minor);
+ sc->sc_flags |= WM_F_PLL_WA_I210;
+ }
+ }
+ if ((sc->sc_flags & WM_F_PLL_WA_I210) != 0)
+ wm_pll_workaround_i210(sc);
switch (sc->sc_type) {
case WM_T_82571:
@@ -2451,6 +2495,9 @@
aprint_error_dev(self, "couldn't establish power handler\n");
sc->sc_flags |= WM_F_ATTACHED;
+#ifdef WM_DEBUG
+ wm_regdump(sc);
+#endif
return;
/*
@@ -2478,6 +2525,9 @@
fail_1:
bus_dmamem_free(sc->sc_dmat, &sc->sc_cd_seg, sc->sc_cd_rseg);
fail_0:
+#ifdef WM_DEBUG
+ wm_regdump(sc);
+#endif
return;
}
@@ -2757,8 +2807,11 @@
case SIOCSIFMEDIA:
case SIOCGIFMEDIA:
WM_BOTH_LOCK(sc);
+ if (cmd == SIOCSIFMEDIA)
+ printf("%s: %s: ifr_media = %08x\n",
+ device_xname(sc->sc_dev), __func__, ifr->ifr_media);
/* Flow control requires full-duplex mode. */
- if (IFM_SUBTYPE(ifr->ifr_media) == IFM_AUTO ||
+ if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO &&
(ifr->ifr_media & IFM_FDX) == 0)
ifr->ifr_media &= ~IFM_ETH_FMASK;
if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO) {
@@ -2774,6 +2827,8 @@
s = splnet();
#endif
error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
+ printf("%s: %s: rv = %d\n", device_xname(sc->sc_dev), __func__,
+ error);
#ifdef WM_MPSAFE
splx(s);
#endif
@@ -3838,7 +3893,11 @@
reg = CSR_READ(sc, WMREG_ICR);
/* reload sc_ctrl */
+ printf("%s: SC_CTRL(2) = %08x (%s)\n", device_xname(sc->sc_dev),
+ sc->sc_ctrl, __func__);
sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
+ printf("%s: SC_CTRL(3) = %08x (%s)\n", device_xname(sc->sc_dev),
+ sc->sc_ctrl, __func__);
if ((sc->sc_type >= WM_T_I350) && (sc->sc_type <= WM_T_I211))
wm_set_eee_i350(sc);
@@ -3858,6 +3917,9 @@
CSR_WRITE(sc, WMREG_WUC, 0);
wm_reset_mdicnfg_82580(sc);
+
+ if ((sc->sc_flags & WM_F_PLL_WA_I210) != 0)
+ wm_pll_workaround_i210(sc);
}
/*
@@ -6027,7 +6089,11 @@
* so we should update sc->sc_ctrl
*/
+ printf("%s: SC_CTRL(8) = %08x (%s)\n",
+ device_xname(sc->sc_dev), sc->sc_ctrl, __func__);
sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
+ printf("%s: SC_CTRL(9) = %08x (%s)\n",
+ device_xname(sc->sc_dev), sc->sc_ctrl, __func__);
sc->sc_tctl &= ~TCTL_COLD(0x3ff);
sc->sc_fcrtl &= ~FCRTL_XONE;
if (status & STATUS_FD)
@@ -6631,19 +6697,24 @@
default:
if (((sc->sc_flags & WM_F_SGMII) != 0)
&& !wm_sgmii_uses_mdio(sc)){
+ /* SGMII */
mii->mii_readreg = wm_sgmii_readreg;
mii->mii_writereg = wm_sgmii_writereg;
} else if (sc->sc_type >= WM_T_80003) {
+ /* 80003 */
mii->mii_readreg = wm_gmii_i80003_readreg;
mii->mii_writereg = wm_gmii_i80003_writereg;
} else if (sc->sc_type >= WM_T_I210) {
- mii->mii_readreg = wm_gmii_i82544_readreg;
- mii->mii_writereg = wm_gmii_i82544_writereg;
+ /* I210 and I211 */
+ mii->mii_readreg = wm_gmii_gs40g_readreg;
+ mii->mii_writereg = wm_gmii_gs40g_writereg;
} else if (sc->sc_type >= WM_T_82580) {
+ /* 82580, I350 and I354 */
sc->sc_phytype = WMPHY_82580;
mii->mii_readreg = wm_gmii_82580_readreg;
mii->mii_writereg = wm_gmii_82580_writereg;
} else if (sc->sc_type >= WM_T_82544) {
+ /* 82544, 0, [56], [17], 8257[1234] and 82583 */
mii->mii_readreg = wm_gmii_i82544_readreg;
mii->mii_writereg = wm_gmii_i82544_writereg;
} else {
@@ -6662,8 +6733,8 @@
wm_gmii_reset(sc);
sc->sc_ethercom.ec_mii = &sc->sc_mii;
- ifmedia_init(&mii->mii_media, IFM_IMASK, wm_gmii_mediachange,
- wm_gmii_mediastatus);
+ ifmedia_init(&mii->mii_media, IFM_IMASK|IFM_ETH_FMASK,
+ wm_gmii_mediachange, wm_gmii_mediastatus);
if ((sc->sc_type == WM_T_82575) || (sc->sc_type == WM_T_82576)
|| (sc->sc_type == WM_T_82580)
@@ -6950,10 +7021,10 @@
MDIC_REGADD(reg));
for (i = 0; i < WM_GEN_POLL_TIMEOUT * 3; i++) {
+ delay(50);
mdic = CSR_READ(sc, WMREG_MDIC);
if (mdic & MDIC_READY)
break;
- delay(50);
}
if ((mdic & MDIC_READY) == 0) {
@@ -6991,10 +7062,10 @@
MDIC_REGADD(reg) | MDIC_DATA(val));
for (i = 0; i < WM_GEN_POLL_TIMEOUT * 3; i++) {
+ delay(50);
mdic = CSR_READ(sc, WMREG_MDIC);
if (mdic & MDIC_READY)
break;
- delay(50);
}
if ((mdic & MDIC_READY) == 0)
@@ -7353,6 +7424,75 @@
}
/*
+ * wm_gmii_gs40g_readreg: [mii interface function]
+ *
+ * Read a PHY register on the I2100 and I211.
+ * This could be handled by the PHY layer if we didn't have to lock the
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