Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch Initialise the windows and allow access to PCI Expr...
details: https://anonhg.NetBSD.org/src/rev/37c9dbe755c5
branches: trunk
changeset: 822268:37c9dbe755c5
user: skrll <skrll%NetBSD.org@localhost>
date: Fri Mar 10 15:44:24 2017 +0000
description:
Initialise the windows and allow access to PCI Express port 1 first lane.
Allows xhci(4) to attach in the MV78230 based Lenovo ix4-300d
mvpex1 at mvsoc0 unit 4 offset 0x80000-0x81fff irq 62: Marvell PCI Express Interface
pci1 at mvpex1
xhci0 at pci1 dev 1 function 0: vendor 1033 product 0194 (rev. 0x04)
xhci0: interrupting at interrupt pin INTA#
usb3 at xhci0: USB revision 3.0
usb4 at xhci0: USB revision 2.0
diffstat:
sys/arch/arm/marvell/armadaxpreg.h | 2 +-
sys/arch/arm/marvell/mvsoc.c | 34 ++++++++++++++++++++++++++--
sys/arch/arm/marvell/mvsoc_space.c | 16 +++++++++++-
sys/arch/arm/marvell/mvsocvar.h | 10 +++++++-
sys/arch/arm/marvell/pci_machdep.c | 27 +++++++++++++++++++++-
sys/arch/evbarm/armadaxp/armadaxp_machdep.c | 32 ++++++++++++++++++--------
6 files changed, 102 insertions(+), 19 deletions(-)
diffs (298 lines):
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/arm/marvell/armadaxpreg.h
--- a/sys/arch/arm/marvell/armadaxpreg.h Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/arm/marvell/armadaxpreg.h Fri Mar 10 15:44:24 2017 +0000
@@ -98,7 +98,7 @@
#define ARMADAXP_ATTR_NAND_RESERVED 0x20
/* PCIe Attributes */
-/* port 0, 1 has 4 lanes */
+/* port 0 has 4 lanes. port 1 has either 4 or 1 lanes. */
#define ARMADAXP_ATTR_PEXx0_MEM 0xe8
#define ARMADAXP_ATTR_PEXx0_IO 0xe0
#define ARMADAXP_ATTR_PEXx1_MEM 0xd8
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/arm/marvell/mvsoc.c
--- a/sys/arch/arm/marvell/mvsoc.c Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/arm/marvell/mvsoc.c Fri Mar 10 15:44:24 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc.c,v 1.28 2017/02/24 17:07:13 skrll Exp $ */
+/* $NetBSD: mvsoc.c,v 1.29 2017/03/10 15:44:24 skrll Exp $ */
/*
* Copyright (c) 2007, 2008, 2013, 2014, 2016 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.28 2017/02/24 17:07:13 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.29 2017/03/10 15:44:24 skrll Exp $");
#include "opt_cputypes.h"
#include "opt_mvsoc.h"
@@ -285,26 +285,52 @@
ARMADAXP_ATTR_PEXx0_MEM, ARMADAXP_UNITID_PEX0 },
{ ARMADAXP_TAG_PEX00_IO,
ARMADAXP_ATTR_PEXx0_IO, ARMADAXP_UNITID_PEX0 },
+
{ ARMADAXP_TAG_PEX01_MEM,
ARMADAXP_ATTR_PEXx1_MEM, ARMADAXP_UNITID_PEX0 },
{ ARMADAXP_TAG_PEX01_IO,
ARMADAXP_ATTR_PEXx1_IO, ARMADAXP_UNITID_PEX0 },
+
{ ARMADAXP_TAG_PEX02_MEM,
ARMADAXP_ATTR_PEXx2_MEM, ARMADAXP_UNITID_PEX0 },
{ ARMADAXP_TAG_PEX02_IO,
ARMADAXP_ATTR_PEXx2_IO, ARMADAXP_UNITID_PEX0 },
+
{ ARMADAXP_TAG_PEX03_MEM,
ARMADAXP_ATTR_PEXx3_MEM, ARMADAXP_UNITID_PEX0 },
{ ARMADAXP_TAG_PEX03_IO,
ARMADAXP_ATTR_PEXx3_IO, ARMADAXP_UNITID_PEX0 },
+
+ { ARMADAXP_TAG_PEX10_MEM,
+ ARMADAXP_ATTR_PEXx0_MEM, ARMADAXP_UNITID_PEX1 },
+ { ARMADAXP_TAG_PEX10_IO,
+ ARMADAXP_ATTR_PEXx0_IO, ARMADAXP_UNITID_PEX1 },
+
+ { ARMADAXP_TAG_PEX11_MEM,
+ ARMADAXP_ATTR_PEXx1_MEM, ARMADAXP_UNITID_PEX1 },
+ { ARMADAXP_TAG_PEX11_IO,
+ ARMADAXP_ATTR_PEXx1_IO, ARMADAXP_UNITID_PEX1 },
+
+ { ARMADAXP_TAG_PEX12_MEM,
+ ARMADAXP_ATTR_PEXx2_MEM, ARMADAXP_UNITID_PEX1 },
+ { ARMADAXP_TAG_PEX12_IO,
+ ARMADAXP_ATTR_PEXx2_IO, ARMADAXP_UNITID_PEX1 },
+
+ { ARMADAXP_TAG_PEX13_MEM,
+ ARMADAXP_ATTR_PEXx3_MEM, ARMADAXP_UNITID_PEX1 },
+ { ARMADAXP_TAG_PEX13_IO,
+ ARMADAXP_ATTR_PEXx3_IO, ARMADAXP_UNITID_PEX1 },
+
{ ARMADAXP_TAG_PEX2_MEM,
ARMADAXP_ATTR_PEX2_MEM, ARMADAXP_UNITID_PEX2 },
{ ARMADAXP_TAG_PEX2_IO,
ARMADAXP_ATTR_PEX2_IO, ARMADAXP_UNITID_PEX2 },
+
{ ARMADAXP_TAG_PEX3_MEM,
ARMADAXP_ATTR_PEX3_MEM, ARMADAXP_UNITID_PEX3 },
{ ARMADAXP_TAG_PEX3_IO,
ARMADAXP_ATTR_PEX3_IO, ARMADAXP_UNITID_PEX3 },
+
{ ARMADAXP_TAG_CRYPT0,
ARMADAXP_ATTR_CRYPT0_NOSWAP, ARMADAXP_UNITID_CRYPT },
{ ARMADAXP_TAG_CRYPT1,
@@ -853,7 +879,9 @@
{ ARMADAXP(MV78230), "mvpex", 1, ARMADAXP_PEX01_BASE,ARMADAXP_IRQ_PEX01 },
{ ARMADAXP(MV78230), "mvpex", 2, ARMADAXP_PEX02_BASE,ARMADAXP_IRQ_PEX02 },
{ ARMADAXP(MV78230), "mvpex", 3, ARMADAXP_PEX03_BASE,ARMADAXP_IRQ_PEX03 },
- { ARMADAXP(MV78230), "mvpex", 4, ARMADAXP_PEX2_BASE,ARMADAXP_IRQ_PEX2 },
+ { ARMADAXP(MV78230), "mvpex", 4, ARMADAXP_PEX10_BASE,ARMADAXP_IRQ_PEX10 },
+ { ARMADAXP(MV78230), "mvpex", 5, ARMADAXP_PEX2_BASE,ARMADAXP_IRQ_PEX2 },
+ { ARMADAXP(MV78230), "mvpex", 6, ARMADAXP_PEX3_BASE,ARMADAXP_IRQ_PEX3 },
{ ARMADAXP(MV78230), "mvsata", 0, ARMADAXP_SATAHC_BASE,ARMADAXP_IRQ_SATA0 },
{ ARMADAXP(MV78230), "mvspi", 0, ARMADAXP_SPI_BASE,ARMADAXP_IRQ_SPI },
{ ARMADAXP(MV78230), "mvsdio", 0, ARMADAXP_SDIO_BASE,ARMADAXP_IRQ_SDIO },
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/arm/marvell/mvsoc_space.c
--- a/sys/arch/arm/marvell/mvsoc_space.c Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/arm/marvell/mvsoc_space.c Fri Mar 10 15:44:24 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc_space.c,v 1.8 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: mvsoc_space.c,v 1.9 2017/03/10 15:44:24 skrll Exp $ */
/*
* Copyright (c) 2007 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.8 2017/01/07 16:19:28 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.9 2017/03/10 15:44:24 skrll Exp $");
#include "opt_mvsoc.h"
#include "mvpex.h"
@@ -303,6 +303,18 @@
MVSOC_BUS_SPACE_DEFAULT_FUNCS
};
+struct bus_space armadaxp_pex10_mem_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX10_MEM,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex10_io_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX10_IO,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
struct bus_space armadaxp_pex2_mem_bs_tag = {
/* cookie */
(void *)ARMADAXP_TAG_PEX2_MEM,
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/arm/marvell/mvsocvar.h
--- a/sys/arch/arm/marvell/mvsocvar.h Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/arm/marvell/mvsocvar.h Fri Mar 10 15:44:24 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsocvar.h,v 1.11 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: mvsocvar.h,v 1.12 2017/03/10 15:44:24 skrll Exp $ */
/*
* Copyright (c) 2007, 2010 KIYOHARA Takashi
* All rights reserved.
@@ -126,6 +126,14 @@
ARMADAXP_TAG_PEX02_IO,
ARMADAXP_TAG_PEX03_MEM,
ARMADAXP_TAG_PEX03_IO,
+ ARMADAXP_TAG_PEX10_MEM,
+ ARMADAXP_TAG_PEX10_IO,
+ ARMADAXP_TAG_PEX11_MEM,
+ ARMADAXP_TAG_PEX11_IO,
+ ARMADAXP_TAG_PEX12_MEM,
+ ARMADAXP_TAG_PEX12_IO,
+ ARMADAXP_TAG_PEX13_MEM,
+ ARMADAXP_TAG_PEX13_IO,
ARMADAXP_TAG_PEX2_MEM,
ARMADAXP_TAG_PEX2_IO,
ARMADAXP_TAG_PEX3_MEM,
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/arm/marvell/pci_machdep.c
--- a/sys/arch/arm/marvell/pci_machdep.c Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/arm/marvell/pci_machdep.c Fri Mar 10 15:44:24 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.10 2016/07/12 13:43:18 kiyohara Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.11 2017/03/10 15:44:24 skrll Exp $ */
/*
* Copyright (c) 2008 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.10 2016/07/12 13:43:18 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.11 2017/03/10 15:44:24 skrll Exp $");
#include "opt_mvsoc.h"
#include "gtpci.h"
@@ -245,6 +245,29 @@
#endif
mvpex_conf_interrupt,
};
+struct arm32_pci_chipset arm32_mvpex6_chipset = {
+ NULL, /* conf_v */
+ mvpex_attach_hook,
+ mvpex_bus_maxdevs,
+ mvpex_make_tag,
+ mvpex_decompose_tag,
+#if NMVPEX_MBUS > 0
+ mvpex_mbus_conf_read, /* XXXX: always this functions */
+#else
+ mvpex_conf_read,
+#endif
+ mvpex_conf_write,
+ NULL, /* intr_v */
+ mvpex_intr_map,
+ mvpex_intr_string,
+ mvpex_intr_evcnt,
+ mvpex_intr_establish,
+ mvpex_intr_disestablish,
+#ifdef __HAVE_PCI_CONF_HOOK
+ mvpex_conf_hook,
+#endif
+ mvpex_conf_interrupt,
+};
#endif /* NMVPEX > 0 */
#if NGTPCI > 0
diff -r 6dd0abbbfe18 -r 37c9dbe755c5 sys/arch/evbarm/armadaxp/armadaxp_machdep.c
--- a/sys/arch/evbarm/armadaxp/armadaxp_machdep.c Fri Mar 10 15:34:17 2017 +0000
+++ b/sys/arch/evbarm/armadaxp/armadaxp_machdep.c Fri Mar 10 15:44:24 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armadaxp_machdep.c,v 1.12 2017/01/07 16:19:29 kiyohara Exp $ */
+/* $NetBSD: armadaxp_machdep.c,v 1.13 2017/03/10 15:44:24 skrll Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -37,7 +37,7 @@
*******************************************************************************/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.12 2017/01/07 16:19:29 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.13 2017/03/10 15:44:24 skrll Exp $");
#include "opt_machdep.h"
#include "opt_mvsoc.h"
@@ -235,8 +235,13 @@
ARMADAXP_TAG_PEX01_MEM, ARMADAXP_TAG_PEX01_IO,
ARMADAXP_TAG_PEX02_MEM, ARMADAXP_TAG_PEX02_IO,
ARMADAXP_TAG_PEX03_MEM, ARMADAXP_TAG_PEX03_IO,
+ ARMADAXP_TAG_PEX10_MEM, ARMADAXP_TAG_PEX10_IO,
+ ARMADAXP_TAG_PEX11_MEM, ARMADAXP_TAG_PEX11_IO,
+ ARMADAXP_TAG_PEX12_MEM, ARMADAXP_TAG_PEX12_IO,
+ ARMADAXP_TAG_PEX13_MEM, ARMADAXP_TAG_PEX13_IO,
ARMADAXP_TAG_PEX2_MEM, ARMADAXP_TAG_PEX2_IO,
- ARMADAXP_TAG_PEX3_MEM, ARMADAXP_TAG_PEX3_IO};
+ ARMADAXP_TAG_PEX3_MEM, ARMADAXP_TAG_PEX3_IO
+ };
nwindow = ARMADAXP_MLMB_NWINDOW;
nremap = ARMADAXP_MLMB_NREMAP;
@@ -501,12 +506,13 @@
armadaxp_pex01_io_bs_tag, armadaxp_pex01_mem_bs_tag,
armadaxp_pex02_io_bs_tag, armadaxp_pex02_mem_bs_tag,
armadaxp_pex03_io_bs_tag, armadaxp_pex03_mem_bs_tag,
+ armadaxp_pex10_io_bs_tag, armadaxp_pex10_mem_bs_tag,
armadaxp_pex2_io_bs_tag, armadaxp_pex2_mem_bs_tag,
armadaxp_pex3_io_bs_tag, armadaxp_pex3_mem_bs_tag;
extern struct arm32_pci_chipset arm32_mvpex0_chipset,
arm32_mvpex1_chipset, arm32_mvpex2_chipset,
arm32_mvpex3_chipset, arm32_mvpex4_chipset,
- arm32_mvpex5_chipset;
+ arm32_mvpex5_chipset, arm32_mvpex6_chipset;
struct marvell_attach_args *mva = aux;
@@ -523,34 +529,40 @@
arm32_mvpex_chipset = &arm32_mvpex0_chipset;
iotag = ARMADAXP_TAG_PEX00_IO;
memtag = ARMADAXP_TAG_PEX00_MEM;
- } else if (mva->mva_offset == MVSOC_PEX_BASE + 0x4000) {
+ } else if (mva->mva_offset == ARMADAXP_PEX01_BASE) {
mvpex_io_bs_tag = &armadaxp_pex01_io_bs_tag;
mvpex_mem_bs_tag = &armadaxp_pex01_mem_bs_tag;
arm32_mvpex_chipset = &arm32_mvpex1_chipset;
iotag = ARMADAXP_TAG_PEX01_IO;
memtag = ARMADAXP_TAG_PEX01_MEM;
- } else if (mva->mva_offset == MVSOC_PEX_BASE + 0x8000) {
+ } else if (mva->mva_offset == ARMADAXP_PEX02_BASE) {
mvpex_io_bs_tag = &armadaxp_pex02_io_bs_tag;
mvpex_mem_bs_tag = &armadaxp_pex02_mem_bs_tag;
arm32_mvpex_chipset = &arm32_mvpex2_chipset;
iotag = ARMADAXP_TAG_PEX02_IO;
memtag = ARMADAXP_TAG_PEX02_MEM;
- } else if (mva->mva_offset == MVSOC_PEX_BASE + 0xc000) {
+ } else if (mva->mva_offset == ARMADAXP_PEX03_BASE) {
mvpex_io_bs_tag = &armadaxp_pex03_io_bs_tag;
mvpex_mem_bs_tag = &armadaxp_pex03_mem_bs_tag;
arm32_mvpex_chipset = &arm32_mvpex3_chipset;
iotag = ARMADAXP_TAG_PEX03_IO;
memtag = ARMADAXP_TAG_PEX03_MEM;
- } else if (mva->mva_offset == MVSOC_PEX_BASE + 0x2000) {
+ } else if (mva->mva_offset == ARMADAXP_PEX10_BASE) {
+ mvpex_io_bs_tag = &armadaxp_pex10_io_bs_tag;
+ mvpex_mem_bs_tag = &armadaxp_pex10_mem_bs_tag;
+ arm32_mvpex_chipset = &arm32_mvpex4_chipset;
+ iotag = ARMADAXP_TAG_PEX10_IO;
+ memtag = ARMADAXP_TAG_PEX10_MEM;
+ } else if (mva->mva_offset == ARMADAXP_PEX2_BASE) {
mvpex_io_bs_tag = &armadaxp_pex2_io_bs_tag;
mvpex_mem_bs_tag = &armadaxp_pex2_mem_bs_tag;
- arm32_mvpex_chipset = &arm32_mvpex4_chipset;
+ arm32_mvpex_chipset = &arm32_mvpex5_chipset;
iotag = ARMADAXP_TAG_PEX2_IO;
memtag = ARMADAXP_TAG_PEX2_MEM;
} else {
mvpex_io_bs_tag = &armadaxp_pex3_io_bs_tag;
mvpex_mem_bs_tag = &armadaxp_pex3_mem_bs_tag;
- arm32_mvpex_chipset = &arm32_mvpex5_chipset;
+ arm32_mvpex_chipset = &arm32_mvpex6_chipset;
iotag = ARMADAXP_TAG_PEX3_IO;
memtag = ARMADAXP_TAG_PEX3_MEM;
}
Home |
Main Index |
Thread Index |
Old Index