[src/trunk]: src/sys/arch/arm/arm32 Whitespace (align comments)

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/98f14f61dec6
branches:  trunk
changeset: 825146:98f14f61dec6
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Jul 01 15:30:41 2017 +0000

description:
Whitespace (align comments)

diffstat:

 sys/arch/arm/arm32/cpuswitch.S |  28 ++++++++++++++--------------
 1 files changed, 14 insertions(+), 14 deletions(-)

diffs (76 lines):

diff -r b7cb90804acb -r 98f14f61dec6 sys/arch/arm/arm32/cpuswitch.S
--- a/sys/arch/arm/arm32/cpuswitch.S    Sat Jul 01 15:28:18 2017 +0000
+++ b/sys/arch/arm/arm32/cpuswitch.S    Sat Jul 01 15:30:41 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpuswitch.S,v 1.91 2017/07/01 15:28:18 skrll Exp $     */
+/*     $NetBSD: cpuswitch.S,v 1.92 2017/07/01 15:30:41 skrll Exp $     */
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
 #include <arm/asm.h>
 #include <arm/locore.h>
 
-       RCSID("$NetBSD: cpuswitch.S,v 1.91 2017/07/01 15:28:18 skrll Exp $")
+       RCSID("$NetBSD: cpuswitch.S,v 1.92 2017/07/01 15:30:41 skrll Exp $")
 
 /* LINTSTUB: include <sys/param.h> */
 
@@ -354,25 +354,25 @@
 ENTRY_NP(softint_switch)
        push    {r4, r6, r7, lr}
 
-       ldr     r7, [r0, #L_CPU]                /* get curcpu */
+       ldr     r7, [r0, #L_CPU]        /* get curcpu */
 #if defined(TPIDRPRW_IS_CURLWP)
-       mrc     p15, 0, r4, c13, c0, 4          /* get old lwp */
+       mrc     p15, 0, r4, c13, c0, 4  /* get old lwp */
 #else
-       ldr     r4, [r7, #(CI_CURLWP)]          /* get old lwp */
+       ldr     r4, [r7, #(CI_CURLWP)]  /* get old lwp */
 #endif
-       mrs     r6, cpsr                        /* we need to save this */
+       mrs     r6, cpsr                /* we need to save this */
 
        /*
         * If the soft lwp blocks, it needs to return to softint_tramp
         */
-       mov     r2, sp                          /* think ip */
-       adr     r3, softint_tramp               /* think lr */
+       mov     r2, sp                  /* think ip */
+       adr     r3, softint_tramp       /* think lr */
        push    {r2-r3}
        push    {r4-r7}
 
-       mov     r5, r0                          /* save new lwp */
+       mov     r5, r0                  /* save new lwp */
 
-       ldr     r2, [r4, #(L_PCB)]              /* get old lwp's pcb */
+       ldr     r2, [r4, #(L_PCB)]      /* get old lwp's pcb */
 
        /* Save all the registers into the old lwp's pcb */
 #if defined(__XSCALE__) || defined(_ARM_ARCH_6)
@@ -401,9 +401,9 @@
         * We're switching to a bound LWP so its l_cpu is already correct.
         */
 #if defined(TPIDRPRW_IS_CURLWP)
-       mcr     p15, 0, r5, c13, c0, 4          /* save new lwp */
+       mcr     p15, 0, r5, c13, c0, 4  /* save new lwp */
 #endif
-       str     r5, [r7, #(CI_CURLWP)]          /* save new lwp */
+       str     r5, [r7, #(CI_CURLWP)]  /* save new lwp */
 
        /*
         * Normally, we'd get {r8-r13} but since this is a softint lwp
@@ -429,9 +429,9 @@
 
        IRQdisable
 #if defined(TPIDRPRW_IS_CURLWP)
-       mcr     p15, 0, r4, c13, c0, 4          /* restore pinned lwp */
+       mcr     p15, 0, r4, c13, c0, 4  /* restore pinned lwp */
 #endif
-       str     r4, [r7, #(CI_CURLWP)]          /* restore pinned lwp */
+       str     r4, [r7, #(CI_CURLWP)]  /* restore pinned lwp */
        ldr     sp, [r2, #(PCB_KSP)]    /* now running on the old stack. */
 
        /* At this point we can allow IRQ's again. */