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[src/trunk]: src/external/gpl3/gcc/dist import GCC 4.8.3 at r208254. these G...
details: https://anonhg.NetBSD.org/src/rev/2509002923f2
branches: trunk
changeset: 793991:2509002923f2
user: mrg <mrg%NetBSD.org@localhost>
date: Mon Mar 03 02:42:38 2014 +0000
description:
import GCC 4.8.3 at r208254. these GCC PRs are fixed since r206687:
c++/37140 c++/41174 c++/54652 c++/55800 c++/57043 c++/57524 c++/57899
c++/58466 c++/58504 c++/58606 c++/58632 c++/58639 c++/58672 c++/58812
c++/58814 c++/58835 c++/58837 c++/58845 c++/58873 c++/58965 c++/59097
c++/59224 c++/59646 c++/59838 c++/59989 c++/60046 c++/60108 c++/60146
c++/60182 c++/60187 c++/60216 c++/60219 c++/60248 c++/60272 c++/60274
c/59891 driver/60233 ipa/55260 libgcc/60166 middle-end/58809 middle-end/59860
middle-end/60004 middle-end/60221 middle-end/60291 objc/56870 other/56653
rtl-optimization/57422 rtl-optimization/60116 target/55426 target/57896
target/58710 target/59142 target/59379 target/59462 target/59695 target/59718
target/59777 target/59794 target/59826 target/59880 target/60017 target/60193
target/60207 tree-optimization/59903 tree-optimization/60115
tree-optimization/60183 tree-optimization/60276
diffstat:
external/gpl3/gcc/dist/gcc/DATESTAMP | 2 +-
external/gpl3/gcc/dist/gcc/c/ChangeLog | 15 +
external/gpl3/gcc/dist/gcc/c/c-typeck.c | 21 +-
external/gpl3/gcc/dist/gcc/combine.c | 14 +-
external/gpl3/gcc/dist/gcc/config.in | 6 +
external/gpl3/gcc/dist/gcc/config/aarch64/aarch64.c | 2 +-
external/gpl3/gcc/dist/gcc/config/arm/arm-ldmstm.ml | 7 +-
external/gpl3/gcc/dist/gcc/config/arm/ldmstm.md | 342 ++++++------
external/gpl3/gcc/dist/gcc/config/arm/predicates.md | 12 +-
external/gpl3/gcc/dist/gcc/config/i386/f16cintrin.h | 2 +-
external/gpl3/gcc/dist/gcc/config/i386/i386.md | 29 +-
external/gpl3/gcc/dist/gcc/config/i386/sse.md | 4 +-
external/gpl3/gcc/dist/gcc/config/microblaze/microblaze.c | 172 ++++--
external/gpl3/gcc/dist/gcc/config/microblaze/microblaze.h | 9 +-
external/gpl3/gcc/dist/gcc/config/microblaze/microblaze.md | 96 ++-
external/gpl3/gcc/dist/gcc/config/microblaze/predicates.md | 8 +
external/gpl3/gcc/dist/gcc/config/s390/s390.c | 5 +-
external/gpl3/gcc/dist/gcc/config/tilegx/sync.md | 11 +-
external/gpl3/gcc/dist/gcc/config/tilegx/tilegx-c.c | 3 +
external/gpl3/gcc/dist/gcc/config/tilegx/tilegx.c | 37 +-
external/gpl3/gcc/dist/gcc/config/tilegx/tilegx.md | 6 +-
external/gpl3/gcc/dist/gcc/config/tilepro/tilepro-c.c | 5 +
external/gpl3/gcc/dist/gcc/config/tilepro/tilepro.c | 6 +
external/gpl3/gcc/dist/gcc/config/tilepro/tilepro.md | 6 +-
external/gpl3/gcc/dist/gcc/cp/ChangeLog | 157 +++++
external/gpl3/gcc/dist/gcc/cp/call.c | 28 +-
external/gpl3/gcc/dist/gcc/cp/cvt.c | 1 +
external/gpl3/gcc/dist/gcc/cp/decl.c | 15 +-
external/gpl3/gcc/dist/gcc/cp/decl2.c | 4 +-
external/gpl3/gcc/dist/gcc/cp/mangle.c | 4 +-
external/gpl3/gcc/dist/gcc/cp/name-lookup.c | 24 +-
external/gpl3/gcc/dist/gcc/cp/parser.c | 26 +-
external/gpl3/gcc/dist/gcc/cp/pt.c | 82 ++-
external/gpl3/gcc/dist/gcc/cp/semantics.c | 24 +-
external/gpl3/gcc/dist/gcc/cp/typeck.c | 13 +-
external/gpl3/gcc/dist/gcc/fold-const.c | 10 +-
external/gpl3/gcc/dist/gcc/gimple-fold.c | 8 +
external/gpl3/gcc/dist/gcc/ipa-cp.c | 4 +-
external/gpl3/gcc/dist/gcc/ipa-prop.c | 3 +-
external/gpl3/gcc/dist/gcc/sel-sched.c | 2 +-
external/gpl3/gcc/dist/gcc/tree-eh.c | 45 +-
external/gpl3/gcc/dist/gcc/tree-ssa-live.c | 3 +-
external/gpl3/gcc/dist/gcc/tree-ssa-phiprop.c | 9 +
external/gpl3/gcc/dist/gcc/tree-vect-data-refs.c | 7 +
external/gpl3/gcc/dist/gcc/tree-vect-loop.c | 5 +-
external/gpl3/gcc/dist/gcc/tree-vect-stmts.c | 28 +
external/gpl3/gcc/dist/gcc/tree-vectorizer.h | 5 +
external/gpl3/gcc/dist/gcc/tree.h | 1 +
external/gpl3/gcc/dist/libbacktrace/ChangeLog | 7 +
external/gpl3/gcc/dist/libbacktrace/Makefile.in | 2 +-
external/gpl3/gcc/dist/libbacktrace/configure | 5 +-
external/gpl3/gcc/dist/libbacktrace/configure.ac | 2 +-
external/gpl3/gcc/dist/libgcc/ChangeLog | 125 ++++
external/gpl3/gcc/dist/libgcc/config/arm/sfp-machine.h | 10 +-
external/gpl3/gcc/dist/libgcc/config/tilepro/atomic.c | 278 ++++++++--
external/gpl3/gcc/dist/libgcc/unwind-seh.c | 5 +-
external/gpl3/gcc/dist/libstdc++-v3/ChangeLog | 9 +
external/gpl3/gcc/dist/libstdc++-v3/libsupc++/eh_alloc.cc | 12 -
external/gpl3/gcc/dist/libstdc++-v3/libsupc++/eh_throw.cc | 3 +
external/gpl3/gcc/dist/maintainer-scripts/ChangeLog | 6 +
external/gpl3/gcc/dist/maintainer-scripts/gcc_release | 4 +-
61 files changed, 1343 insertions(+), 453 deletions(-)
diffs (truncated from 3590 to 300 lines):
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/DATESTAMP
--- a/external/gpl3/gcc/dist/gcc/DATESTAMP Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/DATESTAMP Mon Mar 03 02:42:38 2014 +0000
@@ -1,1 +1,1 @@
-20140116
+20140302
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/c/ChangeLog
--- a/external/gpl3/gcc/dist/gcc/c/ChangeLog Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/c/ChangeLog Mon Mar 03 02:42:38 2014 +0000
@@ -1,3 +1,18 @@
+2014-01-23 Jakub Jelinek <jakub%redhat.com@localhost>
+
+ PR middle-end/58809
+ * c-typeck.c (c_finish_omp_clause): Reject MIN_EXPR, MAX_EXPR,
+ BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.
+
+2014-01-22 Marek Polacek <polacek%redhat.com@localhost>
+
+ Backport from mainline
+ 2014-01-22 Marek Polacek <polacek%redhat.com@localhost>
+
+ PR c/59891
+ * c-typeck.c (build_conditional_expr): Call c_fully_fold instead
+ of remove_c_maybe_const_expr on op1 and op2.
+
2013-12-03 Marek Polacek <polacek%redhat.com@localhost>
Backport from mainline
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/c/c-typeck.c
--- a/external/gpl3/gcc/dist/gcc/c/c-typeck.c Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/c/c-typeck.c Mon Mar 03 02:42:38 2014 +0000
@@ -4334,8 +4334,10 @@
{
if (int_operands)
{
- op1 = remove_c_maybe_const_expr (op1);
- op2 = remove_c_maybe_const_expr (op2);
+ /* Use c_fully_fold here, since C_MAYBE_CONST_EXPR might be
+ nested inside of the expression. */
+ op1 = c_fully_fold (op1, false, NULL);
+ op2 = c_fully_fold (op2, false, NULL);
}
ret = build3 (COND_EXPR, result_type, ifexp, op1, op2);
if (int_operands)
@@ -10621,7 +10623,8 @@
"%qE has invalid type for %<reduction%>", t);
remove = true;
}
- else if (FLOAT_TYPE_P (TREE_TYPE (t)))
+ else if (FLOAT_TYPE_P (TREE_TYPE (t))
+ || TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)
{
enum tree_code r_code = OMP_CLAUSE_REDUCTION_CODE (c);
const char *r_name = NULL;
@@ -10631,8 +10634,14 @@
case PLUS_EXPR:
case MULT_EXPR:
case MINUS_EXPR:
+ break;
case MIN_EXPR:
+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)
+ r_name = "min";
+ break;
case MAX_EXPR:
+ if (TREE_CODE (TREE_TYPE (t)) == COMPLEX_TYPE)
+ r_name = "max";
break;
case BIT_AND_EXPR:
r_name = "&";
@@ -10644,10 +10653,12 @@
r_name = "|";
break;
case TRUTH_ANDIF_EXPR:
- r_name = "&&";
+ if (FLOAT_TYPE_P (TREE_TYPE (t)))
+ r_name = "&&";
break;
case TRUTH_ORIF_EXPR:
- r_name = "||";
+ if (FLOAT_TYPE_P (TREE_TYPE (t)))
+ r_name = "||";
break;
default:
gcc_unreachable ();
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/combine.c
--- a/external/gpl3/gcc/dist/gcc/combine.c Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/combine.c Mon Mar 03 02:42:38 2014 +0000
@@ -3884,15 +3884,19 @@
PATTERN (undobuf.other_insn) = other_pat;
- /* If any of the notes in OTHER_INSN were REG_UNUSED, ensure that they
- are still valid. Then add any non-duplicate notes added by
- recog_for_combine. */
+ /* If any of the notes in OTHER_INSN were REG_DEAD or REG_UNUSED,
+ ensure that they are still valid. Then add any non-duplicate
+ notes added by recog_for_combine. */
for (note = REG_NOTES (undobuf.other_insn); note; note = next)
{
next = XEXP (note, 1);
- if (REG_NOTE_KIND (note) == REG_UNUSED
- && ! reg_set_p (XEXP (note, 0), PATTERN (undobuf.other_insn)))
+ if ((REG_NOTE_KIND (note) == REG_DEAD
+ && !reg_referenced_p (XEXP (note, 0),
+ PATTERN (undobuf.other_insn)))
+ ||(REG_NOTE_KIND (note) == REG_UNUSED
+ && !reg_set_p (XEXP (note, 0),
+ PATTERN (undobuf.other_insn))))
remove_note (undobuf.other_insn, note);
}
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/config.in
--- a/external/gpl3/gcc/dist/gcc/config.in Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/config.in Mon Mar 03 02:42:38 2014 +0000
@@ -363,6 +363,12 @@
#endif
+/* Define if your assembler supports the 'ud2' mnemonic. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_IX86_UD2
+#endif
+
+
/* Define if your assembler supports the lituse_jsrdirect relocation. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_JSRDIRECT_RELOCS
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/config/aarch64/aarch64.c
--- a/external/gpl3/gcc/dist/gcc/config/aarch64/aarch64.c Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/config/aarch64/aarch64.c Mon Mar 03 02:42:38 2014 +0000
@@ -2274,7 +2274,7 @@
if (ncount < zcount)
{
emit_move_insn (gen_rtx_REG (Pmode, regnum),
- GEN_INT ((~val) & 0xffff));
+ GEN_INT (val | ~(HOST_WIDE_INT) 0xffff));
tval = 0xffff;
}
else
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/config/arm/arm-ldmstm.ml
--- a/external/gpl3/gcc/dist/gcc/config/arm/arm-ldmstm.ml Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/config/arm/arm-ldmstm.ml Mon Mar 03 02:42:38 2014 +0000
@@ -67,10 +67,13 @@
Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")")
(nregs + 1) (inout_constr op_type) (constr thumb)
+let reg_predicate thumb =
+ if thumb then "low_register_operand" else "arm_hard_general_register_operand"
+
let write_ldm_set thumb nregs offset opnr first =
let indent = " " in
Printf.printf "%s" (if first then " [" else indent);
- Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr;
+ Printf.printf "(set (match_operand:SI %d \"%s\" \"\")\n" opnr (reg_predicate thumb);
Printf.printf "%s (mem:SI " indent;
begin if offset != 0 then Printf.printf "(plus:SI " end;
Printf.printf "%s" (destreg nregs first IN thumb);
@@ -84,7 +87,7 @@
begin if offset != 0 then Printf.printf "(plus:SI " end;
Printf.printf "%s" (destreg nregs first IN thumb);
begin if offset != 0 then Printf.printf " (const_int %d))" offset end;
- Printf.printf ")\n%s (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr
+ Printf.printf ")\n%s (match_operand:SI %d \"%s\" \"\"))" indent opnr (reg_predicate thumb)
let write_ldm_peep_set extra_indent nregs opnr first =
let indent = " " ^ extra_indent in
diff -r 4e0aac68ef6f -r 2509002923f2 external/gpl3/gcc/dist/gcc/config/arm/ldmstm.md
--- a/external/gpl3/gcc/dist/gcc/config/arm/ldmstm.md Mon Mar 03 02:10:24 2014 +0000
+++ b/external/gpl3/gcc/dist/gcc/config/arm/ldmstm.md Mon Mar 03 02:42:38 2014 +0000
@@ -23,15 +23,15 @@
(define_insn "*ldm4_ia"
[(match_parallel 0 "load_multiple_operation"
- [(set (match_operand:SI 1 "arm_hard_register_operand" "")
+ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")
(mem:SI (match_operand:SI 5 "s_register_operand" "rk")))
- (set (match_operand:SI 2 "arm_hard_register_operand" "")
+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 4))))
- (set (match_operand:SI 3 "arm_hard_register_operand" "")
+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 8))))
- (set (match_operand:SI 4 "arm_hard_register_operand" "")
+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 12))))])]
"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
@@ -41,15 +41,15 @@
(define_insn "*thumb_ldm4_ia"
[(match_parallel 0 "load_multiple_operation"
- [(set (match_operand:SI 1 "arm_hard_register_operand" "")
+ [(set (match_operand:SI 1 "low_register_operand" "")
(mem:SI (match_operand:SI 5 "s_register_operand" "l")))
- (set (match_operand:SI 2 "arm_hard_register_operand" "")
+ (set (match_operand:SI 2 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 4))))
- (set (match_operand:SI 3 "arm_hard_register_operand" "")
+ (set (match_operand:SI 3 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 8))))
- (set (match_operand:SI 4 "arm_hard_register_operand" "")
+ (set (match_operand:SI 4 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 12))))])]
"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
@@ -60,15 +60,15 @@
[(match_parallel 0 "load_multiple_operation"
[(set (match_operand:SI 5 "s_register_operand" "+&rk")
(plus:SI (match_dup 5) (const_int 16)))
- (set (match_operand:SI 1 "arm_hard_register_operand" "")
+ (set (match_operand:SI 1 "arm_hard_general_register_operand" "")
(mem:SI (match_dup 5)))
- (set (match_operand:SI 2 "arm_hard_register_operand" "")
+ (set (match_operand:SI 2 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 4))))
- (set (match_operand:SI 3 "arm_hard_register_operand" "")
+ (set (match_operand:SI 3 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 8))))
- (set (match_operand:SI 4 "arm_hard_register_operand" "")
+ (set (match_operand:SI 4 "arm_hard_general_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 12))))])]
"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
@@ -80,15 +80,15 @@
[(match_parallel 0 "load_multiple_operation"
[(set (match_operand:SI 5 "s_register_operand" "+&l")
(plus:SI (match_dup 5) (const_int 16)))
- (set (match_operand:SI 1 "arm_hard_register_operand" "")
+ (set (match_operand:SI 1 "low_register_operand" "")
(mem:SI (match_dup 5)))
- (set (match_operand:SI 2 "arm_hard_register_operand" "")
+ (set (match_operand:SI 2 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 4))))
- (set (match_operand:SI 3 "arm_hard_register_operand" "")
+ (set (match_operand:SI 3 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 8))))
- (set (match_operand:SI 4 "arm_hard_register_operand" "")
+ (set (match_operand:SI 4 "low_register_operand" "")
(mem:SI (plus:SI (match_dup 5)
(const_int 12))))])]
"TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
@@ -98,13 +98,13 @@
(define_insn "*stm4_ia"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 5 "s_register_operand" "rk"))
- (match_operand:SI 1 "arm_hard_register_operand" ""))
+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))
- (match_operand:SI 2 "arm_hard_register_operand" ""))
+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))
- (match_operand:SI 3 "arm_hard_register_operand" ""))
+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
- (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
"TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
"stm%(ia%)\t%5, {%1, %2, %3, %4}"
[(set_attr "type" "store4")
@@ -115,13 +115,13 @@
[(set (match_operand:SI 5 "s_register_operand" "+&rk")
(plus:SI (match_dup 5) (const_int 16)))
(set (mem:SI (match_dup 5))
- (match_operand:SI 1 "arm_hard_register_operand" ""))
+ (match_operand:SI 1 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))
- (match_operand:SI 2 "arm_hard_register_operand" ""))
+ (match_operand:SI 2 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))
- (match_operand:SI 3 "arm_hard_register_operand" ""))
+ (match_operand:SI 3 "arm_hard_general_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
- (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
"TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
"stm%(ia%)\t%5!, {%1, %2, %3, %4}"
[(set_attr "type" "store4")
@@ -132,29 +132,29 @@
[(set (match_operand:SI 5 "s_register_operand" "+&l")
(plus:SI (match_dup 5) (const_int 16)))
(set (mem:SI (match_dup 5))
- (match_operand:SI 1 "arm_hard_register_operand" ""))
+ (match_operand:SI 1 "low_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 4)))
- (match_operand:SI 2 "arm_hard_register_operand" ""))
+ (match_operand:SI 2 "low_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 8)))
- (match_operand:SI 3 "arm_hard_register_operand" ""))
+ (match_operand:SI 3 "low_register_operand" ""))
(set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
- (match_operand:SI 4 "arm_hard_register_operand" ""))])]
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