[src/trunk]: src/sys/arch/evbarm/stand/bootimx23 Contribution from Petri Laakso.

[jkunz <jkunz%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b586b90da9f3
branches:  trunk
changeset: 783354:b586b90da9f3
user:      jkunz <jkunz%NetBSD.org@localhost>
date:      Sun Dec 16 19:08:44 2012 +0000

description:
Contribution from Petri Laakso.
Refactoring of bootimx23:
- Code style clean up.
- Don't do DCDC initialization in bootimx23. This has proven to be
  unreliable. DCDC initialization will be done in kernel later.
  Use linear regulators while booting to make bootimx23 reliable.

diffstat:

 sys/arch/evbarm/stand/bootimx23/boot_prep.c    |   11 +-
 sys/arch/evbarm/stand/bootimx23/bootimx23.bd   |    4 +-
 sys/arch/evbarm/stand/bootimx23/clock_prep.c   |   62 +-
 sys/arch/evbarm/stand/bootimx23/common.c       |   38 +-
 sys/arch/evbarm/stand/bootimx23/common.h       |   10 +-
 sys/arch/evbarm/stand/bootimx23/emi_prep.c     |  102 +-
 sys/arch/evbarm/stand/bootimx23/pinctrl_prep.c |  145 ++--
 sys/arch/evbarm/stand/bootimx23/power_prep.c   |  657 ++++++------------------
 8 files changed, 365 insertions(+), 664 deletions(-)

diffs (truncated from 1568 to 300 lines):

diff -r fe075bbc0e4f -r b586b90da9f3 sys/arch/evbarm/stand/bootimx23/boot_prep.c
--- a/sys/arch/evbarm/stand/bootimx23/boot_prep.c       Sun Dec 16 18:52:17 2012 +0000
+++ b/sys/arch/evbarm/stand/bootimx23/boot_prep.c       Sun Dec 16 19:08:44 2012 +0000
@@ -1,4 +1,4 @@
-/* $Id: boot_prep.c,v 1.1 2012/11/20 19:08:46 jkunz Exp $ */
+/* $Id: boot_prep.c,v 1.2 2012/12/16 19:08:44 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -39,15 +39,15 @@
 #include "common.h"
 
 /*
- * Initialize i.MX23 power, clock and DRAM.
+ * Initialize i.MX23 power, clocks and DRAM.
  */
 int
 _start(void)
 {
 
-       /* Make sure timer is running */
-       REG_WRITE(HW_DIGCTL_BASE + HW_DIGCTL_CTRL_CLR,
-               HW_DIGCTL_CTRL_XTAL24M_GATE);
+       /* Make sure timer is running. */
+       REG_WR(HW_DIGCTL_BASE + HW_DIGCTL_CTRL_CLR,
+           HW_DIGCTL_CTRL_XTAL24M_GATE);
 
        printf("\n\rBooting");
 
@@ -58,7 +58,6 @@
        putchar('.');
 
        pinctrl_prep();
-       delay_us(1000);
        putchar('.');
        
        emi_prep();
diff -r fe075bbc0e4f -r b586b90da9f3 sys/arch/evbarm/stand/bootimx23/bootimx23.bd
--- a/sys/arch/evbarm/stand/bootimx23/bootimx23.bd      Sun Dec 16 18:52:17 2012 +0000
+++ b/sys/arch/evbarm/stand/bootimx23/bootimx23.bd      Sun Dec 16 19:08:44 2012 +0000
@@ -1,4 +1,4 @@
-/* $Id: bootimx23.bd,v 1.2 2012/11/20 21:36:35 jkunz Exp $ */
+/* $Id: bootimx23.bd,v 1.3 2012/12/16 19:08:44 jkunz Exp $ */
 
 /*
  * elftosb command file.
@@ -25,7 +25,7 @@
        load boot_prep;
        call boot_prep;
 
-       // Load and start NetBSD kernel.
+       // Load kernel to DRAM.
        load netbsd;
        jump netbsd;
 }
diff -r fe075bbc0e4f -r b586b90da9f3 sys/arch/evbarm/stand/bootimx23/clock_prep.c
--- a/sys/arch/evbarm/stand/bootimx23/clock_prep.c      Sun Dec 16 18:52:17 2012 +0000
+++ b/sys/arch/evbarm/stand/bootimx23/clock_prep.c      Sun Dec 16 19:08:44 2012 +0000
@@ -1,4 +1,4 @@
-/* $Id: clock_prep.c,v 1.1 2012/11/20 19:08:46 jkunz Exp $ */
+/* $Id: clock_prep.c,v 1.2 2012/12/16 19:08:44 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -39,26 +39,28 @@
 
 #include "common.h"
 
-void enable_pll(void);
-void enable_ref_cpu(int);
-void enable_ref_emi(int);
-void enable_ref_io(int);
-void use_ref_cpu(void);
-void use_ref_emi(void);
-void use_ref_io(void);
-void set_hbus_div(int);
-void set_emi_div(int);
-void set_ssp_div(int);
+static void enable_pll(void);
+static void enable_ref_cpu(int);
+static void enable_ref_emi(int);
+static void enable_ref_io(int);
+static void use_ref_cpu(void);
+static void use_ref_emi(void);
+static void use_ref_io(void);
+static void set_hbus_div(int);
+static void set_emi_div(int);
+static void set_ssp_div(int);
 
-/* Clock frequences after clock_prep() */
-#define CPU_FRAC 0x13          /* CPUCLK @ 454.74 MHz */
-#define HBUS_DIV 0x3           /* AHBCLK @ 151.58 MHz */
-#define EMI_FRAC 0x21          /* EMICLK @ 130.91 MHz */
-#define EMI_DIV 0x2
-#define IO_FRAC 0x12           /* IOCLK  @ 480.00 MHz */
-#define SSP_DIV 0x5            /* SSPCLK @  96.00 MHz */
+/*
+ * Clock frequences set by clock_prep()
+ */
+#define CPU_FRAC       0x13            /* CPUCLK @ 454.74 MHz */
+#define HBUS_DIV       0x3             /* AHBCLK @ 151.58 MHz */
+#define EMI_FRAC       0x21            /* EMICLK @ 130.91 MHz */
+#define EMI_DIV                0x2
+#define IO_FRAC                0x12            /* IOCLK  @ 480.00 MHz */
+#define SSP_DIV                0x5             /* SSPCLK @  96.00 MHz */
 
-/* Offset to frac register for byte store instructions. (strb) */
+/* Offset to frac register for CLKCTRL_WR_BYTE macro. */
 #define HW_CLKCTRL_FRAC_CPU (HW_CLKCTRL_FRAC+0)
 #define HW_CLKCTRL_FRAC_EMI (HW_CLKCTRL_FRAC+1)
 #define HW_CLKCTRL_FRAC_IO (HW_CLKCTRL_FRAC+3)
@@ -86,9 +88,7 @@
        enable_ref_io(IO_FRAC);
        set_emi_div(EMI_DIV);
        set_hbus_div(HBUS_DIV);
-       delay_us(1000);
        use_ref_cpu();
-       //delay_us(1000);
        use_ref_emi();
        use_ref_io();
        set_ssp_div(SSP_DIV);
@@ -99,7 +99,7 @@
 /*
  * Turn PLL on and wait until it's locked to 480 MHz.
  */
-void
+static void
 enable_pll(void)
 {
 
@@ -112,7 +112,7 @@
 /*
  * Enable fractional divider clock ref_cpu with divide value "frac".
  */
-void
+static void
 enable_ref_cpu(int frac)
 {
        uint32_t reg;
@@ -128,7 +128,7 @@
 /*
  * Enable fractional divider clock ref_emi with divide value "frac".
  */
-void
+static void
 enable_ref_emi(int frac)
 {
        uint32_t reg;
@@ -144,7 +144,7 @@
 /*
  * Enable fractional divider clock ref_io with divide value "frac".
  */
-void
+static void
 enable_ref_io(int frac)
 {
        uint32_t reg;
@@ -160,7 +160,7 @@
 /*
  * Divide CLK_P by "div" to get CLK_H frequency.
  */
-void
+static void
 set_hbus_div(int div)
 {
        uint32_t reg;
@@ -177,7 +177,7 @@
 /*
  * ref_emi is divied "div" to get CLK_EMI.
  */
-void
+static void
 set_emi_div(int div)
 {
        uint32_t reg;
@@ -193,7 +193,7 @@
 /*
  * ref_io is divied "div" to get CLK_SSP.
  */
-void
+static void
 set_ssp_div(int div)
 {
        uint32_t reg;
@@ -209,7 +209,7 @@
 /*
  * Transition from ref_xtal to use ref_cpu.
  */
-void
+static void
 use_ref_cpu(void)
 {
        CLKCTRL_WR(HW_CLKCTRL_CLKSEQ_CLR, HW_CLKCTRL_CLKSEQ_BYPASS_CPU);
@@ -219,7 +219,7 @@
 /*
  * Transition from ref_xtal to use ref_emi and source CLK_EMI from ref_emi.
  */
-void
+static void
 use_ref_emi(void)
 {
        uint32_t reg;
@@ -238,7 +238,7 @@
 /*
  * Transition from ref_xtal to use ref_io and source CLK_SSP from ref_io.
  */
-void
+static void
 use_ref_io(void)
 {
        uint32_t reg;
diff -r fe075bbc0e4f -r b586b90da9f3 sys/arch/evbarm/stand/bootimx23/common.c
--- a/sys/arch/evbarm/stand/bootimx23/common.c  Sun Dec 16 18:52:17 2012 +0000
+++ b/sys/arch/evbarm/stand/bootimx23/common.c  Sun Dec 16 19:08:44 2012 +0000
@@ -1,4 +1,4 @@
-/* $Id: common.c,v 1.1 2012/11/20 19:08:46 jkunz Exp $ */
+/* $Id: common.c,v 1.2 2012/12/16 19:08:44 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,6 +30,7 @@
  */
 
 #include <sys/param.h>
+#include <sys/types.h>
 #include <sys/cdefs.h>
 
 #include <arm/imx/imx23_digctlreg.h>
@@ -38,16 +39,33 @@
 #include "common.h"
 
 /*
- * Delay "delay" microseconds.
+ * Delay us microseconds.
  */
 void
-delay_us(unsigned int delay)
+delay(unsigned int us)
 {
+       uint32_t start;
+       uint32_t now;
+       uint32_t elapsed;
+       uint32_t total;
+       uint32_t last;
+
+       total = 0;
+       last = 0;
+       start = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
 
-       /* Set microsecond timer to 0 */
-       REG_WRITE(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS_CLR, 0xFFFFFFFF);
+       do {
+               now = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
 
-       while (REG_READ(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS) < delay);
+               if (start <= now)
+                       elapsed = now - start;
+               else    /* Take care of overflow. */
+                       elapsed = (UINT32_MAX - start) + 1 + now;
+
+               total += elapsed - last;
+               last = elapsed;
+
+       } while (total < us);
 
        return;
 }
@@ -60,10 +78,14 @@
 {
 
        /* Wait until transmit FIFO has space for the new character. */
-       while (REG_READ(HW_UARTDBG_BASE + HW_UARTDBGFR) & HW_UARTDBGFR_TXFF);
+       while (REG_RD(HW_UARTDBG_BASE + HW_UARTDBGFR) & HW_UARTDBGFR_TXFF);
 
-       REG_WRITE_BYTE(HW_UARTDBG_BASE + HW_UARTDBGDR,
+       REG_WR_BYTE(HW_UARTDBG_BASE + HW_UARTDBGDR,
            __SHIFTIN(ch, HW_UARTDBGDR_DATA));
+#ifdef DEBUG
+       /* Flush: Wait until transmit FIFO contents are written to UART. */
+       while (!(REG_RD(HW_UARTDBG_BASE + HW_UARTDBGFR) & HW_UARTDBGFR_TXFE));
+#endif
 
        return;
 }
diff -r fe075bbc0e4f -r b586b90da9f3 sys/arch/evbarm/stand/bootimx23/common.h
--- a/sys/arch/evbarm/stand/bootimx23/common.h  Sun Dec 16 18:52:17 2012 +0000
+++ b/sys/arch/evbarm/stand/bootimx23/common.h  Sun Dec 16 19:08:44 2012 +0000
@@ -1,4 +1,4 @@
-/* $Id: common.h,v 1.1 2012/11/20 19:08:46 jkunz Exp $ */
+/* $Id: common.h,v 1.2 2012/12/16 19:08:44 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -32,12 +32,12 @@
 #ifndef _BOOTIMX23_COMMON_
 #define _BOOTIMX23_COMMON_
 
-#define REG_READ(reg) *(volatile uint32_t *)(reg)
-#define REG_WRITE(reg, val)                                            \
+#define REG_RD(reg) *(volatile uint32_t *)(reg)