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[src/trunk]: src/sys/arch x86: Add preliminary x2APIC support.
details: https://anonhg.NetBSD.org/src/rev/49e6ccc55351
branches: trunk
changeset: 824098:49e6ccc55351
user: nonaka <nonaka%NetBSD.org@localhost>
date: Tue May 23 08:54:38 2017 +0000
description:
x86: Add preliminary x2APIC support.
x2APIC is used only when x2APIC is enabled in BIOS/UEFI.
LAPIC ID is not supported above 256.
diffstat:
sys/arch/amd64/amd64/db_interface.c | 17 +-
sys/arch/amd64/amd64/mainbus.c | 15 +-
sys/arch/amd64/amd64/vector.S | 266 +++++++++++++++++++++++-
sys/arch/amd64/include/i82093reg.h | 8 +-
sys/arch/i386/i386/db_interface.c | 13 +-
sys/arch/i386/i386/mainbus.c | 21 +-
sys/arch/i386/i386/vector.S | 273 ++++++++++++++++++++++++-
sys/arch/i386/include/i82093reg.h | 8 +-
sys/arch/x86/include/cpuvar.h | 4 +-
sys/arch/x86/include/i82489var.h | 28 +-
sys/arch/x86/include/intr.h | 4 +-
sys/arch/x86/include/mpacpi.h | 5 +-
sys/arch/x86/pci/msipic.c | 9 +-
sys/arch/x86/x86/cpu.c | 13 +-
sys/arch/x86/x86/lapic.c | 403 +++++++++++++++++++++++++++++++----
sys/arch/x86/x86/pmc.c | 10 +-
sys/arch/x86/x86/tprof_amdpmi.c | 10 +-
sys/arch/x86/x86/tprof_pmi.c | 14 +-
sys/arch/xen/include/intr.h | 4 +-
sys/arch/xen/include/mpacpi.h | 4 +-
sys/arch/xen/x86/intr.c | 4 +-
sys/arch/xen/x86/mainbus.c | 12 +-
22 files changed, 995 insertions(+), 150 deletions(-)
diffs (truncated from 2011 to 300 lines):
diff -r 6ff390575b73 -r 49e6ccc55351 sys/arch/amd64/amd64/db_interface.c
--- a/sys/arch/amd64/amd64/db_interface.c Tue May 23 08:48:34 2017 +0000
+++ b/sys/arch/amd64/amd64/db_interface.c Tue May 23 08:54:38 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_interface.c,v 1.24 2011/08/11 19:52:52 cherry Exp $ */
+/* $NetBSD: db_interface.c,v 1.25 2017/05/23 08:54:38 nonaka Exp $ */
/*
* Mach Operating System
@@ -33,11 +33,13 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.24 2011/08/11 19:52:52 cherry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.25 2017/05/23 08:54:38 nonaka Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
+#include "lapic.h"
+
#include <sys/param.h>
#include <sys/proc.h>
#include <sys/reboot.h>
@@ -93,7 +95,7 @@
int ddb_cpu = NOCPU;
typedef void (vector)(void);
-extern vector Xintrddb;
+extern vector Xintrddb, Xx2apic_intrddb;
void
db_machine_init(void)
@@ -101,9 +103,14 @@
#ifdef MULTIPROCESSOR
#ifndef XEN
+ vector *handler = &Xintrddb;
+#if NLAPIC > 0
+ if (lapic_is_x2apic())
+ handler = &Xx2apic_intrddb;
+#endif
ddb_vec = idt_vec_alloc(0xf0, 0xff);
- setgate((struct gate_descriptor *)&idt[ddb_vec], &Xintrddb, 1,
- SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
+ setgate(&idt[ddb_vec], handler, 1, SDT_SYS386IGT, SEL_KPL,
+ GSEL(GCODE_SEL, SEL_KPL));
#else
/* Initialised as part of xen_ipi_init() */
#endif /* XEN */
diff -r 6ff390575b73 -r 49e6ccc55351 sys/arch/amd64/amd64/mainbus.c
--- a/sys/arch/amd64/amd64/mainbus.c Tue May 23 08:48:34 2017 +0000
+++ b/sys/arch/amd64/amd64/mainbus.c Tue May 23 08:54:38 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus.c,v 1.37 2016/06/21 11:33:32 nonaka Exp $ */
+/* $NetBSD: mainbus.c,v 1.38 2017/05/23 08:54:38 nonaka Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.37 2016/06/21 11:33:32 nonaka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.38 2017/05/23 08:54:38 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -126,6 +126,9 @@
int mp_isa_bus = -1;
int mp_eisa_bus = -1;
+bool acpi_present;
+bool mpacpi_active;
+
# ifdef MPVERBOSE
# if MPVERBOSE > 0
int mp_verbose = MPVERBOSE;
@@ -160,13 +163,9 @@
#if NPCI > 0
int mode;
#endif
-#if NACPICA > 0
- int acpi_present = 0;
-#endif
#ifdef MPBIOS
int mpbios_present = 0;
#endif
- int mpacpi_active = 0;
int numcpus = 0;
#if defined(PCI_BUS_FIXUP)
int pci_maxbus = 0;
@@ -202,14 +201,14 @@
#if NACPICA > 0
if ((boothowto & RB_MD2) == 0 && acpi_check(self, "acpibus"))
- acpi_present = acpi_probe();
+ acpi_present = acpi_probe() != 0;
/*
* First, see if the MADT contains CPUs, and possibly I/O APICs.
* Building the interrupt routing structures can only
* be done later (via a callback).
*/
if (acpi_present)
- mpacpi_active = mpacpi_scan_apics(self, &numcpus);
+ mpacpi_active = mpacpi_scan_apics(self, &numcpus) != 0;
#endif
if (!mpacpi_active) {
diff -r 6ff390575b73 -r 49e6ccc55351 sys/arch/amd64/amd64/vector.S
--- a/sys/arch/amd64/amd64/vector.S Tue May 23 08:48:34 2017 +0000
+++ b/sys/arch/amd64/amd64/vector.S Tue May 23 08:54:38 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vector.S,v 1.48 2016/11/25 14:12:55 maxv Exp $ */
+/* $NetBSD: vector.S,v 1.49 2017/05/23 08:54:38 nonaka Exp $ */
/*-
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -118,7 +118,19 @@
INTRENTRY
jmp 1f
IDTVEC_END(recurse_lapic_ipi)
-
+IDTVEC(intr_x2apic_ipi)
+ pushq $0
+ pushq $T_ASTFLT
+ INTRENTRY
+ movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
+ xorl %eax,%eax
+ xorl %edx,%edx
+ wrmsr
+ movl CPUVAR(ILEVEL),%ebx
+ cmpl $IPL_HIGH,%ebx
+ jae 2f
+ jmp 1f
+IDTVEC_END(intr_x2apic_ipi)
IDTVEC(intr_lapic_ipi)
pushq $0
pushq $T_ASTFLT
@@ -128,6 +140,7 @@
movl CPUVAR(ILEVEL),%ebx
cmpl $IPL_HIGH,%ebx
jae 2f
+IDTVEC_END(intr_lapic_ipi)
IDTVEC(resume_lapic_ipi)
1:
incl CPUVAR(IDEPTH)
@@ -140,7 +153,6 @@
orl $(1 << LIR_IPI),CPUVAR(IPENDING)
INTRFASTEXIT
IDTVEC_END(resume_lapic_ipi)
-IDTVEC_END(intr_lapic_ipi)
#if defined(DDB)
IDTVEC(intrddb)
@@ -158,6 +170,24 @@
movq %rax,%cr8
INTRFASTEXIT
IDTVEC_END(intrddb)
+
+IDTVEC(x2apic_intrddb)
+1:
+ pushq $0
+ pushq $T_BPTFLT
+ INTRENTRY
+ movl $0xf,%eax
+ movq %rax,%cr8
+ movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
+ xorl %eax,%eax
+ xorl %edx,%edx
+ wrmsr
+ sti
+ call _C_LABEL(ddb_ipi)
+ xorl %eax,%eax
+ movq %rax,%cr8
+ INTRFASTEXIT
+IDTVEC_END(x2apic_intrddb)
#endif /* DDB */
#endif /* MULTIPROCESSOR */
@@ -171,7 +201,19 @@
INTRENTRY
jmp 1f
IDTVEC_END(recurse_lapic_ltimer)
-
+IDTVEC(intr_x2apic_ltimer)
+ pushq $0
+ pushq $T_ASTFLT
+ INTRENTRY
+ movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
+ xorl %eax,%eax
+ xorl %edx,%edx
+ wrmsr
+ movl CPUVAR(ILEVEL),%ebx
+ cmpl $IPL_CLOCK,%ebx
+ jae 2f
+ jmp 1f
+IDTVEC_END(intr_x2apic_ltimer)
IDTVEC(intr_lapic_ltimer)
pushq $0
pushq $T_ASTFLT
@@ -181,6 +223,7 @@
movl CPUVAR(ILEVEL),%ebx
cmpl $IPL_CLOCK,%ebx
jae 2f
+IDTVEC_END(intr_lapic_ltimer)
IDTVEC(resume_lapic_ltimer)
1:
incl CPUVAR(IDEPTH)
@@ -195,7 +238,6 @@
orl $(1 << LIR_TIMER),CPUVAR(IPENDING)
INTRFASTEXIT
IDTVEC_END(resume_lapic_ltimer)
-IDTVEC_END(intr_lapic_ltimer)
#endif /* NLAPIC > 0 */
#ifndef XEN
@@ -212,6 +254,18 @@
INTRFASTEXIT
IDTVEC_END(intr_lapic_tlb)
+IDTVEC(intr_x2apic_tlb)
+ pushq $0
+ pushq $T_ASTFLT
+ INTRENTRY
+ movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
+ xorl %eax,%eax
+ xorl %edx,%edx
+ wrmsr
+ callq _C_LABEL(pmap_tlb_intr)
+ INTRFASTEXIT
+IDTVEC_END(intr_x2apic_tlb)
+
#endif /* !XEN */
#define voidop(num)
@@ -397,6 +451,72 @@
INTRSTUB(ioapic_level,30,voidop,ioapic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
INTRSTUB(ioapic_level,31,voidop,ioapic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_edge,0,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,1,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,2,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,3,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,4,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,5,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,6,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,7,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,8,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,9,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,10,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,11,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,12,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,13,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,14,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,15,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,16,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,17,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,18,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,19,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,20,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,21,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,22,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,23,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,24,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,25,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,26,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,27,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,28,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,29,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,30,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+INTRSTUB(x2apic_edge,31,voidop,x2apic_asm_ack,voidop,voidop,voidop)
+
+INTRSTUB(x2apic_level,0,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,1,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,2,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,3,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,4,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,5,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,6,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,7,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,8,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,9,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,10,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,11,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,12,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,13,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,14,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,15,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,16,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,17,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,18,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,19,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,20,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,21,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,22,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,23,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,24,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,25,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
+INTRSTUB(x2apic_level,26,voidop,x2apic_asm_ack,voidop,ioapic_unmask,ioapic_mask)
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