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[src/trunk]: src sun4v: Rename TLB_ defines to SUN4U_TLB_ so entries created ...



details:   https://anonhg.NetBSD.org/src/rev/3e1538f043d8
branches:  trunk
changeset: 793636:3e1538f043d8
user:      palle <palle%NetBSD.org@localhost>
date:      Fri Feb 21 18:00:09 2014 +0000

description:
sun4v: Rename TLB_ defines to SUN4U_TLB_ so entries created using TSB_DATA() are properly setup for sun4u and sun4v. Relocate the cputyp variable from autoconf.c to locore.s and make it const in 
param.h so optimized code can be generated. Parts from OpenBSD. Optimization suggested by nakayama@. OK martin@, mrg@, nakayama@

diffstat:

 lib/libkvm/kvm_sparc64.c                        |    7 +-
 sys/arch/sparc/stand/ofwboot/loadfile_machdep.c |   10 +-
 sys/arch/sparc64/doc/TODO                       |    5 +-
 sys/arch/sparc64/include/cpu.h                  |    3 +-
 sys/arch/sparc64/include/param.h                |    5 +-
 sys/arch/sparc64/include/pte.h                  |  117 +++++++++++++----------
 sys/arch/sparc64/sparc64/autoconf.c             |   12 +-
 sys/arch/sparc64/sparc64/genassym.cf            |    5 +-
 sys/arch/sparc64/sparc64/locore.s               |   62 ++++++++----
 9 files changed, 133 insertions(+), 93 deletions(-)

diffs (truncated from 523 to 300 lines):

diff -r ef7b811f948a -r 3e1538f043d8 lib/libkvm/kvm_sparc64.c
--- a/lib/libkvm/kvm_sparc64.c  Fri Feb 21 16:21:02 2014 +0000
+++ b/lib/libkvm/kvm_sparc64.c  Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: kvm_sparc64.c,v 1.16 2014/02/19 20:21:22 dsl Exp $     */
+/*     $NetBSD: kvm_sparc64.c,v 1.17 2014/02/21 18:00:09 palle Exp $   */
 
 /*-
  * Copyright (c) 1992, 1993
@@ -38,7 +38,7 @@
 #if 0
 static char sccsid[] = "@(#)kvm_sparc.c        8.1 (Berkeley) 6/4/93";
 #else
-__RCSID("$NetBSD: kvm_sparc64.c,v 1.16 2014/02/19 20:21:22 dsl Exp $");
+__RCSID("$NetBSD: kvm_sparc64.c,v 1.17 2014/02/21 18:00:09 palle Exp $");
 #endif
 #endif /* LIBC_SCCS and not lint */
 
@@ -64,6 +64,7 @@
 #include <machine/pmap.h>
 #include <machine/kcore.h>
 #include <machine/vmparam.h>
+#include <machine/param.h>
 
 #include <limits.h>
 #include <db.h>
@@ -210,7 +211,7 @@
         * XXXX -- We could support multiple page sizes.
         */
        va = va & (kd->nbpg - 1);
-       data &= TLB_PA_MASK;
+       data &= SUN4U_TLB_PA_MASK; /* XXX handle sun4u/sun4v */
        *pa = data + va;
 
        /*
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc/stand/ofwboot/loadfile_machdep.c
--- a/sys/arch/sparc/stand/ofwboot/loadfile_machdep.c   Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc/stand/ofwboot/loadfile_machdep.c   Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: loadfile_machdep.c,v 1.11 2013/12/08 14:41:28 palle Exp $      */
+/*     $NetBSD: loadfile_machdep.c,v 1.12 2014/02/21 18:00:09 palle Exp $      */
 
 /*-
  * Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -341,7 +341,7 @@
                        DPRINTF(("mmu_mapin: 0x%lx:0x%x.0x%x\n", va,
                            hi(pa), lo(pa)));
 
-                       data = TSB_DATA(0,              /* global */
+                       data = SUN4U_TSB_DATA(0,        /* global */
                                        PGSZ_4M,        /* 4mb page */
                                        pa,             /* phys.address */
                                        1,              /* privileged */
@@ -351,7 +351,7 @@
                                        1,              /* valid */
                                        0               /* endianness */
                                        );
-                       data |= TLB_L | TLB_CV; /* locked, virt.cache */
+                       data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
 
                        dtlb_store[dtlb_slot].te_pa = pa;
                        dtlb_store[dtlb_slot].te_va = va;
@@ -634,7 +634,7 @@
                                continue;
                }
 
-               data = TSB_DATA(0,              /* global */
+               data = SUN4U_TSB_DATA(0,        /* global */
                                PGSZ_4M,        /* 4mb page */
                                dtlb_store[i].te_pa,    /* phys.address */
                                1,              /* privileged */
@@ -644,7 +644,7 @@
                                1,              /* valid */
                                0               /* endianness */
                                );
-               data |= TLB_L | TLB_CV; /* locked, virt.cache */
+               data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
                if (!writable_text)
                        dtlb_replace(dtlb_store[i].te_va, hi(data), lo(data));
                itlb_store[itlb_slot] = dtlb_store[i];
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc64/doc/TODO
--- a/sys/arch/sparc64/doc/TODO Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc64/doc/TODO Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
- /* $NetBSD: TODO,v 1.1 2014/01/25 19:07:25 palle Exp $ */
+ /* $NetBSD: TODO,v 1.2 2014/02/21 18:00:09 palle Exp $ */
 
 Things to be done:
 
@@ -7,3 +7,6 @@
 sun4v:
 - 64-bit kernel support
 - 32-bit kernel support
+- libkvm
+- ofwboot: tlb_init_sun4v() hardcodes number of slots to 64
+- sun4v_datatrap: missing implementation
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc64/include/cpu.h
--- a/sys/arch/sparc64/include/cpu.h    Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc64/include/cpu.h    Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.109 2014/01/09 20:28:23 palle Exp $ */
+/*     $NetBSD: cpu.h,v 1.110 2014/02/21 18:00:09 palle Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -381,6 +381,7 @@
 void   clearfpstate(void);
 uint64_t       probeget(paddr_t, int, int);
 int    probeset(paddr_t, int, int, uint64_t);
+void   setcputyp(int);
 
 #define         write_all_windows() __asm volatile("flushw" : : )
 #define         write_user_windows() __asm volatile("flushw" : : )
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc64/include/param.h
--- a/sys/arch/sparc64/include/param.h  Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc64/include/param.h  Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: param.h,v 1.52 2013/12/16 20:17:35 palle Exp $ */
+/*     $NetBSD: param.h,v 1.53 2014/02/21 18:00:09 palle Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -228,7 +228,8 @@
 #define mstohz(ms) ((ms + 0UL) * hz / 1000)
 #endif
 
-extern int cputyp;
+/* Keep this a const so compiler optimization is done */
+extern const int cputyp;
 
 #if defined (SUN4US) || defined (SUN4V)
 #define CPU_ISSUN4U     (cputyp == CPU_SUN4U)
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc64/include/pte.h
--- a/sys/arch/sparc64/include/pte.h    Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc64/include/pte.h    Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pte.h,v 1.24 2013/12/16 20:17:35 palle Exp $ */
+/*     $NetBSD: pte.h,v 1.25 2014/02/21 18:00:09 palle Exp $ */
 
 /*
  * Copyright (c) 1996-1999 Eduardo Horvath
@@ -152,41 +152,41 @@
 #define        PGSZ_512K               2
 #define        PGSZ_4M                 3
 
-#define        PGSZ_SHIFT              61
-#define        TLB_SZ(s)               (((uint64_t)(s))<<PGSZ_SHIFT)
+#define        SUN4U_PGSZ_SHIFT        61
+#define        SUN4U_TLB_SZ(s)         (((uint64_t)(s))<<SUN4U_PGSZ_SHIFT)
 
 /* TLB data masks */
-#define TLB_V                  0x8000000000000000LL
-#define TLB_8K                 TLB_SZ(PGSZ_8K)
-#define TLB_64K                        TLB_SZ(PGSZ_64K)
-#define TLB_512K               TLB_SZ(PGSZ_512K)
-#define TLB_4M                 TLB_SZ(PGSZ_4M)
-#define TLB_SZ_MASK            0x6000000000000000LL
-#define TLB_NFO                        0x1000000000000000LL
-#define TLB_IE                 0x0800000000000000LL
-#define TLB_SOFT2_MASK         0x07fc000000000000LL
-#define TLB_RESERVED_MASK      0x0003f80000000000LL
-#define TLB_PA_MASK            0x000007ffffffe000LL
-#define TLB_SOFT_MASK          0x0000000000001f80LL
+#define SUN4U_TLB_V            0x8000000000000000LL
+#define SUN4U_TLB_8K           SUN4U_TLB_SZ(PGSZ_8K)
+#define SUN4U_TLB_64K          SUN4U_TLB_SZ(PGSZ_64K)
+#define SUN4U_TLB_512K         SUN4U_TLB_SZ(PGSZ_512K)
+#define SUN4U_TLB_4M           SUN4U_TLB_SZ(PGSZ_4M)
+#define SUN4U_TLB_SZ_MASK      0x6000000000000000LL
+#define SUN4U_TLB_NFO          0x1000000000000000LL
+#define SUN4U_TLB_IE           0x0800000000000000LL
+#define SUN4U_TLB_SOFT2_MASK   0x07fc000000000000LL
+#define SUN4U_TLB_RESERVED_MASK        0x0003f80000000000LL
+#define SUN4U_TLB_PA_MASK      0x000007ffffffe000LL
+#define SUN4U_TLB_SOFT_MASK    0x0000000000001f80LL
 /* S/W bits */
 /* Access & TSB locked bits are swapped so I can set access w/one insn */
-/* #define TLB_ACCESS          0x0000000000001000LL */
-#define TLB_ACCESS             0x0000000000000200LL
-#define TLB_MODIFY             0x0000000000000800LL
-#define TLB_REAL_W             0x0000000000000400LL
-/* #define TLB_TSB_LOCK                0x0000000000000200LL */
-#define TLB_TSB_LOCK           0x0000000000001000LL
+/* #define SUN4U_TLB_ACCESS    0x0000000000001000LL */
+#define SUN4U_TLB_ACCESS       0x0000000000000200LL
+#define SUN4U_TLB_MODIFY       0x0000000000000800LL
+#define SUN4U_TLB_REAL_W       0x0000000000000400LL
+/* #define SUN4U_TLB_TSB_LOCK  0x0000000000000200LL */
+#define SUN4U_TLB_TSB_LOCK     0x0000000000001000LL
 #define SUN4U_TLB_EXEC         0x0000000000000100LL
-#define TLB_EXEC_ONLY          0x0000000000000080LL
+#define SUN4U_TLB_EXEC_ONLY    0x0000000000000080LL
 /* H/W bits */
-#define TLB_L                  0x0000000000000040LL
-#define TLB_CACHE_MASK         0x0000000000000030LL
-#define TLB_CP                 0x0000000000000020LL
-#define TLB_CV                 0x0000000000000010LL
-#define TLB_E                  0x0000000000000008LL
-#define TLB_P                  0x0000000000000004LL
-#define TLB_W                  0x0000000000000002LL
-#define TLB_G                  0x0000000000000001LL
+#define SUN4U_TLB_L            0x0000000000000040LL
+#define SUN4U_TLB_CACHE_MASK   0x0000000000000030LL
+#define SUN4U_TLB_CP           0x0000000000000020LL
+#define SUN4U_TLB_CV           0x0000000000000010LL
+#define SUN4U_TLB_E            0x0000000000000008LL
+#define SUN4U_TLB_P            0x0000000000000004LL
+#define SUN4U_TLB_W            0x0000000000000002LL
+#define SUN4U_TLB_G            0x0000000000000001LL
 
 /* Use a bit in the SOFT2 area to indicate a locked mapping. */
 #define        TLB_WIRED               0x0010000000000000LL
@@ -196,23 +196,23 @@
  * be duplicates of the above w/o the "long long"
  */
 /* S/W bits */
-/* #define TTE_ACCESS          0x0000000000001000 */
-#define TTE_ACCESS             0x0000000000000200
-#define TTE_MODIFY             0x0000000000000800
-#define TTE_REAL_W             0x0000000000000400
-/* #define TTE_TSB_LOCK                0x0000000000000200 */
-#define TTE_TSB_LOCK           0x0000000000001000
-#define TTE_EXEC               0x0000000000000100
-#define TTE_EXEC_ONLY          0x0000000000000080
+/* #define SUN4U_TTE_ACCESS    0x0000000000001000 */
+#define SUN4U_TTE_ACCESS       0x0000000000000200
+#define SUN4U_TTE_MODIFY       0x0000000000000800
+#define SUN4U_TTE_REAL_W       0x0000000000000400
+/* #define SUN4U_TTE_TSB_LOCK  0x0000000000000200 */
+#define SUN4U_TTE_TSB_LOCK     0x0000000000001000
+#define SUN4U_TTE_EXEC         0x0000000000000100
+#define SUN4U_TTE_EXEC_ONLY    0x0000000000000080
 /* H/W bits */
-#define TTE_L                  0x0000000000000040
-#define TTE_CACHE_MASK         0x0000000000000030
-#define TTE_CP                 0x0000000000000020
-#define TTE_CV                 0x0000000000000010
-#define TTE_E                  0x0000000000000008
-#define TTE_P                  0x0000000000000004
-#define TTE_W                  0x0000000000000002
-#define TTE_G                  0x0000000000000001
+#define SUN4U_TTE_L            0x0000000000000040
+#define SUN4U_TTE_CACHE_MASK   0x0000000000000030
+#define SUN4U_TTE_CP           0x0000000000000020
+#define SUN4U_TTE_CV           0x0000000000000010
+#define SUN4U_TTE_E            0x0000000000000008
+#define SUN4U_TTE_P            0x0000000000000004
+#define SUN4U_TTE_W            0x0000000000000002
+#define SUN4U_TTE_G            0x0000000000000001
 
 #define TTE_DATA_BITS  "\177\20" \
         "b\77V\0" "f\75\2SIZE\0" "b\77V\0" "f\75\2SIZE\0" \
@@ -255,10 +255,10 @@
 #define SUN4V_TLB_W            0x0000000000000040LL
 #define SUN4V_TLB_G            0x0000000000000000LL
 
-#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
-(((valid)?TLB_V:0LL)|TLB_SZ(sz)|(((uint64_t)(pa))&TLB_PA_MASK)|\
-((cache)?((aliased)?TLB_CP:TLB_CACHE_MASK):TLB_E)|\
-((priv)?TLB_P:0LL)|((write)?TLB_W:0LL)|((g)?TLB_G:0LL)|((ie)?TLB_IE:0LL))
+#define SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
+(((valid)?SUN4U_TLB_V:0LL)|SUN4U_TLB_SZ(sz)|(((uint64_t)(pa))&SUN4U_TLB_PA_MASK)|\
+((cache)?((aliased)?SUN4U_TLB_CP:SUN4U_TLB_CACHE_MASK):SUN4U_TLB_E)|\
+((priv)?SUN4U_TLB_P:0LL)|((write)?SUN4U_TLB_W:0LL)|((g)?SUN4U_TLB_G:0LL)|((ie)?SUN4U_TLB_IE:0LL))
 
 #define SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
 (((valid)?SUN4V_TLB_V:0LL)|SUN4V_TLB_SZ(sz)|\
@@ -267,8 +267,23 @@
 ((priv)?SUN4V_TLB_P:0LL)|((write)?SUN4V_TLB_W:0LL)|((g)?SUN4V_TLB_G:0LL)|\
 ((ie)?SUN4V_TLB_IE:0LL))
 
+#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
+(CPU_ISSUN4V ? SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) : \
+               SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie))
 
-#define TLB_EXEC (CPU_ISSUN4V ? SUN4V_TLB_EXEC : SUN4U_TLB_EXEC)
+#define TLB_EXEC      (CPU_ISSUN4V ? SUN4V_TLB_EXEC      : SUN4U_TLB_EXEC)
+#define TLB_V         (CPU_ISSUN4V ? SUN4V_TLB_V         : SUN4U_TLB_V)
+#define TLB_PA_MASK   (CPU_ISSUN4V ? SUN4V_TLB_PA_MASK   : SUN4U_TLB_PA_MASK)
+#define TLB_CP        (CPU_ISSUN4V ? SUN4V_TLB_CP        : SUN4U_TLB_CP)
+#define TLB_P         (CPU_ISSUN4V ? SUN4V_TLB_P         : SUN4U_TLB_P)
+#define TLB_W         (CPU_ISSUN4V ? SUN4V_TLB_W         : SUN4U_TLB_W)
+#define TLB_ACCESS    (CPU_ISSUN4V ? SUN4V_TLB_ACCESS    : SUN4U_TLB_ACCESS)
+#define TLB_MODIFY    (CPU_ISSUN4V ? SUN4V_TLB_MODIFY    : SUN4U_TLB_MODIFY)
+#define TLB_REAL_W    (CPU_ISSUN4V ? SUN4V_TLB_REAL_W    : SUN4U_TLB_REAL_W)
+#define TLB_TSB_LOCK  (CPU_ISSUN4V ? SUN4V_TLB_TSB_LOCK  : SUN4U_TLB_TSB_LOCK)
+#define TLB_EXEC_ONLY (CPU_ISSUN4V ? SUN4V_TLB_EXEC_ONLY : SUN4U_TLB_EXEC_ONLY)
+#define TLB_L         (CPU_ISSUN4V ? SUN4V_TLB_L         : SUN4U_TLB_L)
+#define TLB_CV        (CPU_ISSUN4V ? SUN4V_TLB_CV        : SUN4U_TLB_CV)
 
 #define MMU_CACHE_VIRT 0x3
 #define MMU_CACHE_PHYS 0x2
diff -r ef7b811f948a -r 3e1538f043d8 sys/arch/sparc64/sparc64/autoconf.c
--- a/sys/arch/sparc64/sparc64/autoconf.c       Fri Feb 21 16:21:02 2014 +0000
+++ b/sys/arch/sparc64/sparc64/autoconf.c       Fri Feb 21 18:00:09 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: autoconf.c,v 1.192 2013/09/24 18:11:54 jdc Exp $ */
+/*     $NetBSD: autoconf.c,v 1.193 2014/02/21 18:00:09 palle Exp $ */
 
 /*



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