[src/trunk]: src/sys/arch/x86/include Fix the bit positions in CPUID_SEF_FLAG...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/69b4e58523b2
branches:  trunk
changeset: 788867:69b4e58523b2
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Jul 25 16:31:33 2013 +0000

description:
Fix the bit positions in CPUID_SEF_FLAGS macro. On snprintb(), position 1
means LSB(bit0). The bit position from HLE to SMAP was 1 bit right shifted.
The bit position of BMI1 was completely wrong.

diffstat:

 sys/arch/x86/include/specialreg.h |  24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)

diffs (38 lines):

diff -r 984089e08d0f -r 69b4e58523b2 sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Thu Jul 25 15:09:27 2013 +0000
+++ b/sys/arch/x86/include/specialreg.h Thu Jul 25 16:31:33 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.63 2013/03/06 11:51:40 yamt Exp $     */
+/*     $NetBSD: specialreg.h,v 1.64 2013/07/25 16:31:33 msaitoh Exp $  */
 
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
@@ -179,17 +179,17 @@
 
 #define CPUID_SEF_FLAGS        "\20" \
        "\1" "FSGSBASE" \
-       "\2" "BMI1" \
-       "\4" "HLE" \
-       "\5" "AVX2" \
-       "\7" "SMEP" \
-       "\10" "BMI2" \
-       "\11" "ERMS" \
-       "\12" "INVPCID" \
-       "\13" "RTM" \
-       "\22" "RDSEED" \
-       "\23" "ADX" \
-       "\24" "SMAP"
+       "\4" "BMI1" \
+       "\5" "HLE" \
+       "\6" "AVX2" \
+       "\10" "SMEP" \
+       "\11" "BMI2" \
+       "\12" "ERMS" \
+       "\13" "INVPCID" \
+       "\14" "RTM" \
+       "\23" "RDSEED" \
+       "\24" "ADX" \
+       "\25" "SMAP"
 
 /* Intel Fn80000001 extended features - %edx */
 #define CPUID_SYSCALL  0x00000800      /* SYSCALL/SYSRET */