[src/trunk]: src/sys/arch/arm/include Add inlines for SCTRL

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/25c804eaa9f9
branches:  trunk
changeset: 782976:25c804eaa9f9
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Nov 29 18:15:33 2012 +0000

description:
Add inlines for SCTRL

diffstat:

 sys/arch/arm/include/armreg.h |  4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diffs (18 lines):

diff -r 40ac3dff980e -r 25c804eaa9f9 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Thu Nov 29 17:38:26 2012 +0000
+++ b/sys/arch/arm/include/armreg.h     Thu Nov 29 18:15:33 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.69 2012/09/27 21:48:17 matt Exp $ */
+/*     $NetBSD: armreg.h,v 1.70 2012/11/29 18:15:33 matt Exp $ */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -580,6 +580,8 @@
 ARMREG_READ_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
 ARMREG_WRITE_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
 /* c1 registers */
+ARMREG_READ_INLINE(sctrl, "p15,0,%0,c1,c0,0") /* System Control Register */
+ARMREG_WRITE_INLINE(sctrl, "p15,0,%0,c1,c0,0") /* System Control Register */
 ARMREG_READ_INLINE(auxctl, "p15,0,%0,c1,c0,1") /* Auxiliary Control Register */
 ARMREG_WRITE_INLINE(auxctl, "p15,0,%0,c1,c0,1") /* Auxiliary Control Register */
 ARMREG_READ_INLINE(cpacr, "p15,0,%0,c1,c0,2") /* Co-Processor Access Control Register */