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[src/trunk]: src/sys Remove IPL_LPT and IPL_IPI aliases, use the actual IPLs.



details:   https://anonhg.NetBSD.org/src/rev/3b73b642ef6d
branches:  trunk
changeset: 749292:3b73b642ef6d
user:      rmind <rmind%NetBSD.org@localhost>
date:      Wed Nov 25 14:28:49 2009 +0000

description:
Remove IPL_LPT and IPL_IPI aliases, use the actual IPLs.
Fix some broken comments.

diffstat:

 sys/arch/acorn26/ioc/arcpp.c     |  12 ++++++------
 sys/arch/alpha/include/lock.h    |   4 ++--
 sys/arch/amd64/amd64/genassym.cf |   3 +--
 sys/arch/amd64/amd64/locore.S    |   6 +++---
 sys/arch/amd64/amd64/spl.S       |   4 ++--
 sys/arch/arm/gemini/gemini_ipi.c |   9 ++++-----
 sys/arch/i386/i386/genassym.cf   |   3 +--
 sys/arch/i386/i386/locore.S      |   8 ++++----
 sys/arch/i386/i386/machdep.c     |   6 +++---
 sys/arch/i386/i386/spl.S         |   6 +++---
 sys/arch/i386/i386/vector.S      |   8 ++++----
 sys/arch/sparc64/include/psl.h   |   5 +----
 sys/arch/x86/x86/intr.c          |   6 +++---
 sys/arch/x86/x86/pmap.c          |   6 +++---
 sys/dev/ic/lpt.c                 |   8 ++++----
 sys/dev/ic/sl811hs.c             |  12 +++++-------
 sys/sys/intr.h                   |   6 +-----
 17 files changed, 50 insertions(+), 62 deletions(-)

diffs (truncated from 477 to 300 lines):

diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/acorn26/ioc/arcpp.c
--- a/sys/arch/acorn26/ioc/arcpp.c      Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/acorn26/ioc/arcpp.c      Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arcpp.c,v 1.10 2009/01/07 23:05:46 bjh21 Exp $ */
+/* $NetBSD: arcpp.c,v 1.11 2009/11/25 14:28:49 rmind Exp $ */
 
 /*-
  * Copyright (c) 2001 Ben Harris
@@ -52,7 +52,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: arcpp.c,v 1.10 2009/01/07 23:05:46 bjh21 Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arcpp.c,v 1.11 2009/11/25 14:28:49 rmind Exp $");
 
 #include <sys/conf.h>
 #include <sys/device.h>
@@ -158,9 +158,9 @@
            device_xname(self), "ack intr");
        evcnt_attach_dynamic(&sc->sc_bintrcnt, EVCNT_TYPE_INTR, NULL,
            device_xname(self), "busy intr");
-       sc->sc_aih = irq_establish(IRQ_PACK, IPL_LPT, arcppintr, sc,
+       sc->sc_aih = irq_establish(IRQ_PACK, IPL_VM, arcppintr, sc,
            &sc->sc_aintrcnt);
-       sc->sc_bih = irq_establish(IRQ_PBSY, IPL_LPT, arcppintr, sc,
+       sc->sc_bih = irq_establish(IRQ_PBSY, IPL_VM, arcppintr, sc,
            &sc->sc_bintrcnt);
 
        /* We're not interested in interrupts while the device is closed. */
@@ -200,7 +200,7 @@
        iot = sc->sc_iot;
        ioh = sc->sc_ioh;
 
-       s = spllpt();
+       s = splvm();
        /* wait till ready (printer running diagnostics) */
        irq_enable(sc->sc_bih);
        /* XXX Is it really appropriate to time out? */
@@ -253,7 +253,7 @@
        while (sc->sc_count > 0) {
                /* if the printer is ready for a char, give it one */
                if ((sc->sc_state & ARCPP_OBUSY) == 0) {
-                       s = spllpt();
+                       s = splvm();
                        arcppintr(sc);
                        splx(s);
                }
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/alpha/include/lock.h
--- a/sys/arch/alpha/include/lock.h     Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/alpha/include/lock.h     Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.27 2008/04/28 20:23:11 martin Exp $ */
+/* $NetBSD: lock.h,v 1.28 2009/11/25 14:28:50 rmind Exp $ */
 
 /*-
  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@@ -166,7 +166,7 @@
        if (__ci->ci_ipis != 0) {                                       \
                /* printf("CPU %lu has IPIs pending\n",                 \
                    __ci->ci_cpuid); */                                 \
-               __s = splipi();                                         \
+               __s = splhigh();                                                \
                alpha_ipi_process(__ci, NULL);                          \
                splx(__s);                                              \
        }                                                               \
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/amd64/amd64/genassym.cf
--- a/sys/arch/amd64/amd64/genassym.cf  Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/amd64/amd64/genassym.cf  Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.41 2009/11/21 03:11:01 rmind Exp $
+#      $NetBSD: genassym.cf,v 1.42 2009/11/25 14:28:50 rmind Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -324,7 +324,6 @@
 define IPL_PREEMPT             IPL_PREEMPT
 define IPL_CLOCK               IPL_CLOCK
 define IPL_HIGH                IPL_HIGH
-define IPL_IPI                 IPL_IPI
 
 define LIR_IPI                 LIR_IPI
 define LIR_TIMER               LIR_TIMER
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S     Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/amd64/amd64/locore.S     Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.52 2009/10/19 18:41:10 bouyer Exp $       */
+/*     $NetBSD: locore.S,v 1.53 2009/11/25 14:28:50 rmind Exp $        */
 
 /*
  * Copyright-o-rama!
@@ -948,13 +948,13 @@
        jne     5f
 
        /*
-        * Restore cr0 (including FPU state).  Raise the IPL to IPL_IPI.
+        * Restore cr0 (including FPU state).  Raise the IPL to IPL_HIGH.
         * FPU IPIs can alter the LWP's saved cr0.  Dropping the priority
         * is deferred until mi_switch(), when cpu_switchto() returns.
         */
 2:
 #ifndef XEN
-       movl    $IPL_IPI,CPUVAR(ILEVEL)
+       movl    $IPL_HIGH,CPUVAR(ILEVEL)
        movl    PCB_CR0(%r14),%ecx      /* has CR0_TS clear */
        movq    %cr0,%rdx
 
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/amd64/amd64/spl.S
--- a/sys/arch/amd64/amd64/spl.S        Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/amd64/amd64/spl.S        Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: spl.S,v 1.21 2009/04/02 00:19:02 enami Exp $   */
+/*     $NetBSD: spl.S,v 1.22 2009/11/25 14:28:50 rmind Exp $   */
 
 /*
  * Copyright (c) 2003 Wasabi Systems, Inc.
@@ -265,7 +265,7 @@
  * It is important that the bit scan instruction is bsr, it will get
  * the highest 2 bits (currently the IPI and clock handlers) first,
  * to avoid deadlocks where one CPU sends an IPI, another one is at
- * splipi() and defers it, lands in here via splx(), and handles
+ * splhigh() and defers it, lands in here via splx(), and handles
  * a lower-prio one first, which needs to take the kernel lock -->
  * the sending CPU will never see the that CPU accept the IPI
  * (see pmap_tlb_shootnow).
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/arm/gemini/gemini_ipi.c
--- a/sys/arch/arm/gemini/gemini_ipi.c  Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/arm/gemini/gemini_ipi.c  Wed Nov 25 14:28:49 2009 +0000
@@ -7,7 +7,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: gemini_ipi.c,v 1.4 2008/12/06 05:22:39 cliff Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gemini_ipi.c,v 1.5 2009/11/25 14:28:50 rmind Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -58,10 +58,9 @@
                 panic("%s: Cannot map registers", device_xname(self));
 
        /*
-        * NOTE we are using IPL_NET, not IPL_IPI a.k.a. IPL_HIGH
-        * use of IPI on this system is (mainly) networking
-        * keep simple (for now) and force all IPIs to same level
-        * so splnet() can block them as any other NIC.
+        * NOTE: we are using IPL_NET, not IPL_HIGH use of IPI on this system
+        * is (mainly) networking keep simple (for now) and force all IPIs
+        * to same level so splnet() can block them as any other NIC.
         */
 #if 0
        ih = intr_establish(obio->obio_intr, IPL_NET, IST_LEVEL_HIGH,
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/i386/i386/genassym.cf
--- a/sys/arch/i386/i386/genassym.cf    Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/i386/i386/genassym.cf    Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.82 2009/11/21 03:11:00 rmind Exp $
+#      $NetBSD: genassym.cf,v 1.83 2009/11/25 14:28:50 rmind Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -391,7 +391,6 @@
 define IPL_SCHED               IPL_SCHED
 define IPL_CLOCK               IPL_CLOCK
 define IPL_HIGH                IPL_HIGH
-define IPL_IPI                 IPL_IPI
 
 define IPL_SOFTNET             IPL_SOFTNET
 define IPL_SOFTCLOCK           IPL_SOFTCLOCK
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/i386/i386/locore.S
--- a/sys/arch/i386/i386/locore.S       Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/i386/i386/locore.S       Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.89 2009/10/19 18:41:10 bouyer Exp $       */
+/*     $NetBSD: locore.S,v 1.90 2009/11/25 14:28:50 rmind Exp $        */
 
 /*
  * Copyright-o-rama!
@@ -129,7 +129,7 @@
  */
 
 #include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.89 2009/10/19 18:41:10 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.90 2009/11/25 14:28:50 rmind Exp $");
 
 #include "opt_compat_oldboot.h"
 #include "opt_ddb.h"
@@ -989,13 +989,13 @@
        jne     5f
 
        /*
-        * Restore cr0 (including FPU state).  Raise the IPL to IPL_IPI.
+        * Restore cr0 (including FPU state).  Raise the IPL to IPL_HIGH.
         * FPU IPIs can alter the LWP's saved cr0.  Dropping the priority
         * is deferred until mi_switch(), when cpu_switchto() returns.
         */
 2:
 #ifndef XEN
-       movl    $IPL_IPI,CPUVAR(ILEVEL)
+       movl    $IPL_HIGH,CPUVAR(ILEVEL)
        movl    PCB_CR0(%ebx),%ecx              /* has CR0_TS clear */
        movl    %cr0,%edx
 
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/i386/i386/machdep.c
--- a/sys/arch/i386/i386/machdep.c      Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/i386/i386/machdep.c      Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.676 2009/11/23 05:01:12 dholland Exp $   */
+/*     $NetBSD: machdep.c,v 1.677 2009/11/25 14:28:50 rmind Exp $      */
 
 /*-
  * Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006, 2008, 2009
@@ -67,7 +67,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.676 2009/11/23 05:01:12 dholland Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.677 2009/11/25 14:28:50 rmind Exp $");
 
 #include "opt_beep.h"
 #include "opt_compat_ibcs2.h"
@@ -1598,7 +1598,7 @@
        intr_default_setup();
 #endif
 
-       splraise(IPL_IPI);
+       splraise(IPL_HIGH);
        x86_enable_intr();
 
 #ifdef DDB
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/i386/i386/spl.S
--- a/sys/arch/i386/i386/spl.S  Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/i386/i386/spl.S  Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: spl.S,v 1.33 2009/11/03 05:23:27 dyoung Exp $  */
+/*     $NetBSD: spl.S,v 1.34 2009/11/25 14:28:50 rmind Exp $   */
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: spl.S,v 1.33 2009/11/03 05:23:27 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spl.S,v 1.34 2009/11/25 14:28:50 rmind Exp $");
 
 #include "opt_vm86.h"
 #include "opt_ddb.h"
@@ -157,7 +157,7 @@
  * It is important that the bit scan instruction is bsr, it will get
  * the highest 2 bits (currently the IPI and clock handlers) first,
  * to avoid deadlocks where one CPU sends an IPI, another one is at
- * splipi() and defers it, lands in here via splx(), and handles
+ * splhigh() and defers it, lands in here via splx(), and handles
  * a lower-prio one first, which needs to take the kernel lock -->
  * the sending CPU will never see the that CPU accept the IPI
  * (see pmap_tlb_shootnow).
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/i386/i386/vector.S
--- a/sys/arch/i386/i386/vector.S       Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/i386/i386/vector.S       Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vector.S,v 1.48 2009/07/29 12:02:06 cegger Exp $       */
+/*     $NetBSD: vector.S,v 1.49 2009/11/25 14:28:50 rmind Exp $        */
 
 /*
  * Copyright 2002 (c) Wasabi Systems, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.48 2009/07/29 12:02:06 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.49 2009/11/25 14:28:50 rmind Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -150,14 +150,14 @@
        INTRENTRY               
        movl    $0,_C_LABEL(local_apic)+LAPIC_EOI
        movl    CPUVAR(ILEVEL),%ebx
-       cmpl    $IPL_IPI,%ebx
+       cmpl    $IPL_HIGH,%ebx
        jae     2f
 IDTVEC_END(intr_lapic_ipi)
 IDTVEC(resume_lapic_ipi)
 1:
        pushl   %ebx
        IDEPTH_INCR
-       movl    $IPL_IPI,CPUVAR(ILEVEL)
+       movl    $IPL_HIGH,CPUVAR(ILEVEL)
        sti
        call    _C_LABEL(x86_ipi_handler)
        cli
diff -r e0da2c25e1ce -r 3b73b642ef6d sys/arch/sparc64/include/psl.h
--- a/sys/arch/sparc64/include/psl.h    Wed Nov 25 13:54:23 2009 +0000
+++ b/sys/arch/sparc64/include/psl.h    Wed Nov 25 14:28:49 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: psl.h,v 1.41 2009/05/16 19:15:34 nakayama Exp $ */
+/*     $NetBSD: psl.h,v 1.42 2009/11/25 14:28:50 rmind Exp $ */
 
 /*



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