[src/trunk]: src/sys/arch/evbarm/gumstix Disable L2 Cache when boot time.

[kiyohara <kiyohara%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f907760a458c
branches:  trunk
changeset: 757401:f907760a458c
user:      kiyohara <kiyohara%NetBSD.org@localhost>
date:      Sat Aug 28 04:12:40 2010 +0000

description:
Disable L2 Cache when boot time.

diffstat:

 sys/arch/evbarm/gumstix/gumstix_start.S |  7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diffs (21 lines):

diff -r a93126c54317 -r f907760a458c sys/arch/evbarm/gumstix/gumstix_start.S
--- a/sys/arch/evbarm/gumstix/gumstix_start.S   Sat Aug 28 04:06:40 2010 +0000
+++ b/sys/arch/evbarm/gumstix/gumstix_start.S   Sat Aug 28 04:12:40 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gumstix_start.S,v 1.7 2010/07/10 08:17:48 kiyohara Exp $ */
+/*     $NetBSD: gumstix_start.S,v 1.8 2010/08/28 04:12:40 kiyohara Exp $ */
 /*
  * Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
  * All rights reserved.
@@ -195,6 +195,11 @@
        orr     r0, r0, #CPU_CONTROL_SYST_ENABLE
 #endif
 #if defined(CPU_CORTEXA8)
+       /* Disable L2 cache beforehand. */
+       mrc     p15, 0, r1, c1, c0, 1
+       bic     r1, r1, #0x2            /* clear L2EN */
+       mcr     p15, 0, r1, c1, c0, 1
+
        orr     r0, r0, #CPU_CONTROL_AFLT_ENABLE | CPU_CONTROL_DC_ENABLE
        orr     r0, r0, #CPU_CONTROL_BPRD_ENABLE | CPU_CONTROL_IC_ENABLE
 #endif