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[src/netbsd-6]: src/sys/dev/pci Apply changes (requested by msaitoh in ticket...
details: https://anonhg.NetBSD.org/src/rev/9c4c109bd086
branches: netbsd-6
changeset: 776384:9c4c109bd086
user: riz <riz%NetBSD.org@localhost>
date: Sun Jul 14 20:39:13 2013 +0000
description:
Apply changes (requested by msaitoh in ticket #907):
sys/dev/pci/if_wm.c 1.238, 1.244-1.247, 1.249-1.258
sys/dev/pci/if_wmreg.h 1.50-1.51, 1.53
sys/dev/pci/if_wmvar.h 1.15-1.16
Various fixes to wm(4):
Add I21[0178] support.
Fix a bug that wm_attach() may fail on some PCH2 or newer system.
wm_valid_nvm_bank_detect_ich8lan() misunderstood the NVM's bank
number. Fixes PR#47878.
Fix a bug that the check of reset complete fails on Intel 8 series
with "wm_lan_init_done: lan_init_done failed to complete" message.
The broken code was used for ICH8, 9... and PCH2.
The wm_linkintr_gmii() function is called from interrupt. That's
not tick, so call mii_pollstat() instead of mii_tick().
Add ECC support for the packet buffer. Only 82571 and I21[78] support
ECC.
Fix a bug that wrong semaphore is used in wm_gmii_hv_{read,write}reg.
Change style, add comments, fix some comments, use macros and
remove trailing whitespaces.
[msaitoh, ticket #907]
diffstat:
sys/dev/pci/if_wm.c | 495 ++++++++++++++++++++++++++++++++++--------------
sys/dev/pci/if_wmreg.h | 52 +++++-
sys/dev/pci/if_wmvar.h | 6 +-
3 files changed, 400 insertions(+), 153 deletions(-)
diffs (truncated from 1323 to 300 lines):
diff -r ab40e8de7215 -r 9c4c109bd086 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c Sun Jul 14 20:35:48 2013 +0000
+++ b/sys/dev/pci/if_wm.c Sun Jul 14 20:39:13 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.227.2.8 2013/02/18 18:05:29 riz Exp $ */
+/* $NetBSD: if_wm.c,v 1.227.2.9 2013/07/14 20:39:13 riz Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -37,32 +37,32 @@
/*******************************************************************************
- Copyright (c) 2001-2005, Intel Corporation
+ Copyright (c) 2001-2005, Intel Corporation
All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
+
+ Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
+
+ 1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
+
+ 3. Neither the name of the Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
-
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
@@ -76,7 +76,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.8 2013/02/18 18:05:29 riz Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.9 2013/07/14 20:39:13 riz Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -533,10 +533,8 @@
static int wm_gmii_i82543_readreg(device_t, int, int);
static void wm_gmii_i82543_writereg(device_t, int, int, int);
-
static int wm_gmii_i82544_readreg(device_t, int, int);
static void wm_gmii_i82544_writereg(device_t, int, int, int);
-
static int wm_gmii_i80003_readreg(device_t, int, int);
static void wm_gmii_i80003_writereg(device_t, int, int, int);
static int wm_gmii_bm_readreg(device_t, int, int);
@@ -1024,6 +1022,41 @@
"I350 Gigabit Connection",
WM_T_I350, WMP_F_1000T },
#endif
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_T1,
+ "I210-T1 Ethernet Server Adapter",
+ WM_T_I210, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_OEM1,
+ "I210 Ethernet (Copper OEM)",
+ WM_T_I210, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_IT,
+ "I210 Ethernet (Copper IT)",
+ WM_T_I210, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER,
+ "I210 Gigabit Ethernet (Fiber)",
+ WM_T_I210, WMP_F_1000X },
+#if 0
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES,
+ "I210 Gigabit Ethernet (SERDES)",
+ WM_T_I210, WMP_F_SERDES },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII,
+ "I210 Gigabit Ethernet (SGMII)",
+ WM_T_I210, WMP_F_SERDES },
+#endif
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER,
+ "I211 Ethernet (COPPER)",
+ WM_T_I211, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I217_V,
+ "I217 V Ethernet Connection",
+ WM_T_PCH_LPT, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I217_LM,
+ "I217 LM Ethernet Connection",
+ WM_T_PCH_LPT, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_V,
+ "I218 V Ethernet Connection",
+ WM_T_PCH_LPT, WMP_F_1000T },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_LM,
+ "I218 LM Ethernet Connection",
+ WM_T_PCH_LPT, WMP_F_1000T },
{ 0, 0,
NULL,
0, 0 },
@@ -1175,7 +1208,8 @@
if ((sc->sc_type == WM_T_82575) || (sc->sc_type == WM_T_82576)
|| (sc->sc_type == WM_T_82580) || (sc->sc_type == WM_T_82580ER)
- || (sc->sc_type == WM_T_I350))
+ || (sc->sc_type == WM_T_I350) || (sc->sc_type == WM_T_I210)
+ || (sc->sc_type == WM_T_I211))
sc->sc_flags |= WM_F_NEWQUEUE;
/* Set device properties (mactype) */
@@ -1325,7 +1359,8 @@
if ((sc->sc_type != WM_T_ICH8) && (sc->sc_type != WM_T_ICH9)
&& (sc->sc_type != WM_T_ICH10)
&& (sc->sc_type != WM_T_PCH)
- && (sc->sc_type != WM_T_PCH2)) {
+ && (sc->sc_type != WM_T_PCH2)
+ && (sc->sc_type != WM_T_PCH_LPT)) {
sc->sc_flags |= WM_F_EEPROM_SEMAPHORE;
/* ICH* and PCH* have no PCIe capability registers */
if (pci_get_capability(pa->pa_pc, pa->pa_tag,
@@ -1494,7 +1529,8 @@
CSR_READ(sc, WMREG_RXERRC);
/* get PHY control from SMBus to PCIe */
- if ((sc->sc_type == WM_T_PCH) || (sc->sc_type == WM_T_PCH2))
+ if ((sc->sc_type == WM_T_PCH) || (sc->sc_type == WM_T_PCH2)
+ || (sc->sc_type == WM_T_PCH_LPT))
wm_smbustopci(sc);
/*
@@ -1514,6 +1550,7 @@
case WM_T_ICH10:
case WM_T_PCH:
case WM_T_PCH2:
+ case WM_T_PCH_LPT:
if (wm_check_mng_mode(sc) != 0)
wm_get_hw_control(sc);
break;
@@ -1590,6 +1627,7 @@
case WM_T_ICH10:
case WM_T_PCH:
case WM_T_PCH2:
+ case WM_T_PCH_LPT:
/* FLASH */
sc->sc_flags |= WM_F_EEPROM_FLASH | WM_F_SWFWHW_SYNC;
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, WM_ICH8_FLASH);
@@ -1609,6 +1647,11 @@
sc->sc_ich8_flash_bank_size *= ICH_FLASH_SECTOR_SIZE;
sc->sc_ich8_flash_bank_size /= 2 * sizeof(uint16_t);
break;
+ case WM_T_I210:
+ case WM_T_I211:
+ sc->sc_flags |= WM_F_EEPROM_FLASH_HW;
+ sc->sc_flags |= WM_F_EEPROM_EERDEEWR | WM_F_SWFW_SYNC;
+ break;
default:
break;
}
@@ -1636,7 +1679,9 @@
if (sc->sc_flags & WM_F_EEPROM_INVALID)
aprint_verbose_dev(sc->sc_dev, "No EEPROM\n");
- else if (sc->sc_flags & WM_F_EEPROM_FLASH) {
+ else if (sc->sc_flags & WM_F_EEPROM_FLASH_HW) {
+ aprint_verbose_dev(sc->sc_dev, "FLASH(HW)\n");
+ } else if (sc->sc_flags & WM_F_EEPROM_FLASH) {
aprint_verbose_dev(sc->sc_dev, "FLASH\n");
} else {
if (sc->sc_flags & WM_F_EEPROM_SPI)
@@ -1731,6 +1776,7 @@
case WM_T_ICH10:
case WM_T_PCH:
case WM_T_PCH2:
+ case WM_T_PCH_LPT:
/* XXX The funcid should be checked on some devices */
apme_mask = WUC_APME;
eeprom_data = CSR_READ(sc, WMREG_WUC);
@@ -1833,7 +1879,8 @@
*/
if (sc->sc_type == WM_T_ICH8 || sc->sc_type == WM_T_ICH9
|| sc->sc_type == WM_T_ICH10 || sc->sc_type == WM_T_PCH
- || sc->sc_type == WM_T_PCH2 || sc->sc_type == WM_T_82573
+ || sc->sc_type == WM_T_PCH2 || sc->sc_type == WM_T_PCH_LPT
+ || sc->sc_type == WM_T_82573
|| sc->sc_type == WM_T_82574 || sc->sc_type == WM_T_82583) {
/* STATUS_TBIMODE reserved/reused, can't rely on it */
wm_gmii_mediainit(sc, wmp->wmp_product);
@@ -1850,6 +1897,8 @@
case WM_T_82580:
case WM_T_82580ER:
case WM_T_I350:
+ case WM_T_I210:
+ case WM_T_I211:
reg = CSR_READ(sc, WMREG_CTRL_EXT);
switch (reg & CTRL_EXT_LINK_MODE_MASK) {
case CTRL_EXT_LINK_MODE_SGMII:
@@ -1914,10 +1963,13 @@
case WM_T_82580:
case WM_T_82580ER:
case WM_T_I350:
+ case WM_T_I210:
+ case WM_T_I211:
case WM_T_80003:
case WM_T_ICH9:
case WM_T_ICH10:
case WM_T_PCH2: /* PCH2 supports 9K frame size */
+ case WM_T_PCH_LPT:
/* XXX limited to 9234 */
sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU;
break;
@@ -2109,7 +2161,7 @@
if_detach(ifp);
- /* Unload RX dmamaps and free mbufs */
+ /* Unload RX dmamaps and free mbufs */
wm_rxdrain(sc);
/* Free dmamap. It's the same as the end of the wm_attach() function */
@@ -2958,9 +3010,9 @@
sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_vl_len =
htole32(vl_len);
sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_sn = 0;
- sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_cmd =
+ sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_cmd =
htole32(cmdc);
- sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_mssidx =
+ sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_mssidx =
htole32(mssidx);
WM_CDTXSYNC(sc, sc->sc_txnext, 1, BUS_DMASYNC_PREWRITE);
DPRINTF(WM_DEBUG_TX,
@@ -3161,7 +3213,7 @@
htole32(fields);
DPRINTF(WM_DEBUG_TX,
("%s: TX: adv data desc %d 0x%" PRIx64 "\n",
- device_xname(sc->sc_dev), nexttx,
+ device_xname(sc->sc_dev), nexttx,
(uint64_t)dmamap->dm_segs[0].ds_addr));
DPRINTF(WM_DEBUG_TX,
("\t 0x%08x%08x\n", fields,
@@ -3646,7 +3698,7 @@
/*
* Okay, we have the entire packet now. The chip is
- * configured to include the FCS except I350
+ * configured to include the FCS except I350 and I21[01]
* (not all chips can be configured to strip it),
* so we need to trim it.
* May need to adjust length of previous mbuf in the
@@ -3654,7 +3706,8 @@
* For an eratta, the RCTL_SECRC bit in RCTL register
* is always set in I350, so we don't trim it.
*/
- if (sc->sc_type != WM_T_I350) {
+ if ((sc->sc_type != WM_T_I350) && (sc->sc_type != WM_T_I210)
+ && (sc->sc_type != WM_T_I211)) {
if (m->m_len < ETHER_CRC_LEN) {
sc->sc_rxtail->m_len
-= (ETHER_CRC_LEN - m->m_len);
@@ -3767,9 +3820,9 @@
if (icr & ICR_LSC) {
DPRINTF(WM_DEBUG_LINK,
- ("%s: LINK: LSC -> mii_tick\n",
+ ("%s: LINK: LSC -> mii_pollstat\n",
device_xname(sc->sc_dev)));
- mii_tick(&sc->sc_mii);
+ mii_pollstat(&sc->sc_mii);
if (sc->sc_type == WM_T_82543) {
int miistatus, active;
@@ -3994,6 +4047,10 @@
case WM_T_82580ER:
sc->sc_pba = PBA_35K;
break;
+ case WM_T_I210:
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