[src/trunk]: src/sys/dev/pci bugfixes:

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/95b606975d15
branches:  trunk
changeset: 750583:95b606975d15
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Jan 07 17:34:38 2010 +0000

description:
bugfixes:
 - add missing break in wm_reset()...
 - fix the offset of WMREG_PBS...
 - fix length of some delay()s in wm_gmii_reset()

diffstat:

 sys/dev/pci/if_wm.c    |  10 +++++-----
 sys/dev/pci/if_wmreg.h |   4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diffs (63 lines):

diff -r 9bdbf411ca5e -r 95b606975d15 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Thu Jan 07 13:26:00 2010 +0000
+++ b/sys/dev/pci/if_wm.c       Thu Jan 07 17:34:38 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.187 2010/01/05 10:02:01 msaitoh Exp $      */
+/*     $NetBSD: if_wm.c,v 1.188 2010/01/07 17:34:38 msaitoh Exp $      */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.187 2010/01/05 10:02:01 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.188 2010/01/07 17:34:38 msaitoh Exp $");
 
 #include "bpfilter.h"
 #include "rnd.h"
@@ -3121,7 +3121,7 @@
                wm_get_swfwhw_semaphore(sc);
                CSR_WRITE(sc, WMREG_CTRL, CTRL_RST | CTRL_PHY_RESET);
                delay(10000);
-
+               break;
        default:
                /* Everything else can safely use the documented method. */
                CSR_WRITE(sc, WMREG_CTRL, CTRL_RST);
@@ -4596,7 +4596,7 @@
                CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_PHY_RESET);
                delay((sc->sc_type >= WM_T_82571) ? 100 : 10*1000);
                CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
-               delay(150*1000);
+               delay(150);
 
                if ((sc->sc_type == WM_T_82541)
                    || (sc->sc_type == WM_T_82541_2)
@@ -4613,7 +4613,7 @@
                CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_PHY_RESET);
                delay(100);
                CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
-               delay(150*1000);
+               delay(150);
 
                /* Allow time for h/w to get to a quiescent state afer reset */
                delay(10*1000);
diff -r 9bdbf411ca5e -r 95b606975d15 sys/dev/pci/if_wmreg.h
--- a/sys/dev/pci/if_wmreg.h    Thu Jan 07 13:26:00 2010 +0000
+++ b/sys/dev/pci/if_wmreg.h    Thu Jan 07 17:34:38 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wmreg.h,v 1.30 2010/01/05 10:02:01 msaitoh Exp $    */
+/*     $NetBSD: if_wmreg.h,v 1.31 2010/01/07 17:34:38 msaitoh Exp $    */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -610,7 +610,7 @@
 #define        PBA_40K         0x0028
 #define        PBA_48K         0x0030          /* 48K, default Rx allocation */
 
-#define        WMREG_PBS       0x1000  /* Packet Buffer Size (ICH8 only ?) */
+#define        WMREG_PBS       0x1008  /* Packet Buffer Size (ICH) */
 
 #define        WMREG_TXDMAC    0x3000  /* Transfer DMA Control */
 #define        TXDMAC_DPP      (1U << 0)       /* disable packet prefetch */