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[src/trunk]: src/sys/arch/evbarm Get the PANDABOARD to boot (hangs in USB).
details: https://anonhg.NetBSD.org/src/rev/6f0828ea45b0
branches: trunk
changeset: 781407:6f0828ea45b0
user: matt <matt%NetBSD.org@localhost>
date: Wed Sep 05 00:06:21 2012 +0000
description:
Get the PANDABOARD to boot (hangs in USB).
diffstat:
sys/arch/evbarm/beagle/beagle_machdep.c | 56 ++++++++++++++++++++++++++++++--
sys/arch/evbarm/beagle/beagle_start.S | 7 +++-
sys/arch/evbarm/conf/PANDABOARD | 32 ++++++++++--------
3 files changed, 74 insertions(+), 21 deletions(-)
diffs (252 lines):
diff -r 88306f156fa7 -r 6f0828ea45b0 sys/arch/evbarm/beagle/beagle_machdep.c
--- a/sys/arch/evbarm/beagle/beagle_machdep.c Tue Sep 04 22:58:35 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_machdep.c Wed Sep 05 00:06:21 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: beagle_machdep.c,v 1.21 2012/09/04 00:19:20 matt Exp $ */
+/* $NetBSD: beagle_machdep.c,v 1.22 2012/09/05 00:06:21 matt Exp $ */
/*
* Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.21 2012/09/04 00:19:20 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.22 2012/09/05 00:06:21 matt Exp $");
#include "opt_machdep.h"
#include "opt_ddb.h"
@@ -167,12 +167,14 @@
#include <arm/undefined.h>
#include <arm/arm32/machdep.h>
+#include <arm/mainbus/mainbus.h>
#include <arm/omap/omap_com.h>
#include <arm/omap/omap_var.h>
#include <arm/omap/omap_wdtvar.h>
#include <arm/omap/omap2_prcm.h>
+#include <evbarm/include/autoconf.h>
#include <evbarm/beagle/beagle.h>
#include "prcm.h"
@@ -182,6 +184,8 @@
char *boot_args = NULL;
char *boot_file = NULL;
+u_int uboot_args[4] = { 0 }; /* filled in by beagle_start.S (not in bss) */
+
/* Same things, but for the free (unused by the kernel) memory. */
extern char KERNEL_BASE_phys[];
@@ -201,6 +205,7 @@
#endif
static void init_clocks(void);
+static void beagle_device_register(device_t, void *);
static void beagle_reset(void);
#if defined(OMAP_3530) || defined(TI_DM37XX)
static void omap3_cpu_clk(void);
@@ -368,7 +373,6 @@
omap3_cpu_clk(); // find our CPU speed.
#endif
#if defined(OMAP_4430)
- if (0)
omap4_cpu_clk(); // find our CPU speed.
#endif
/* Heads up ... Setup the CPU / MMU / TLB functions. */
@@ -383,6 +387,8 @@
#if 1
beagle_putchar('h');
#endif
+ printf("uboot arg = %#x, %#x, %#x, %#x\n",
+ uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
#ifdef KGDB
kgdb_port_init();
#endif
@@ -419,7 +425,7 @@
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, false);
/* we've a specific device_register routine */
- //evbarm_device_register = beagle_device_register;
+ evbarm_device_register = beagle_device_register;
db_trap_callback = beagle_db_trap;
@@ -487,12 +493,16 @@
void
beagle_reset(void)
{
+#if defined(OMAP_4430)
+ *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM;
+#else
#if NPRCM > 0
prcm_cold_reset();
#endif
#if NOMAPWDT32K > 0
omapwdt32k_reboot();
#endif
+#endif
}
#ifdef KGDB
@@ -572,6 +582,42 @@
/*
* MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
*/
- curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT;
+ curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
+ printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n",
+ __func__, curcpu()->ci_data.cpu_cc_freq,
+ sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT);
}
#endif /* OMAP_4400 */
+
+void
+beagle_device_register(device_t self, void *aux)
+{
+ prop_dictionary_t dict = device_properties(self);
+
+ if (device_is_a(self, "armperiph")
+ && device_is_a(device_parent(self), "mainbus")) {
+ /*
+ * XXX KLUDGE ALERT XXX
+ * The iot mainbus supplies is completely wrong since it scales
+ * addresses by 2. The simpliest remedy is to replace with our
+ * bus space used for the armcore regisers (which armperiph uses).
+ */
+ struct mainbus_attach_args * const mb = aux;
+ mb->mb_iot = &omap_bs_tag;
+ return;
+ }
+
+ /*
+ * We need to tell the A9 Global/Watchdog Timer
+ * what frequency it runs at.
+ */
+ if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ /*
+ * This clock always runs at (arm_clk div 2) and only goes
+ * to timers that are part of the A9 MP core subsystem.
+ */
+ prop_dictionary_set_uint32(dict, "frequency",
+ curcpu()->ci_data.cpu_cc_freq / 2);
+ return;
+ }
+}
diff -r 88306f156fa7 -r 6f0828ea45b0 sys/arch/evbarm/beagle/beagle_start.S
--- a/sys/arch/evbarm/beagle/beagle_start.S Tue Sep 04 22:58:35 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_start.S Wed Sep 05 00:06:21 2012 +0000
@@ -92,7 +92,7 @@
#include <arm/omap/omap2_obioreg.h>
#include <evbarm/beagle/beagle.h>
-RCSID("$NetBSD: beagle_start.S,v 1.10 2012/09/01 14:54:59 matt Exp $")
+RCSID("$NetBSD: beagle_start.S,v 1.11 2012/09/05 00:06:21 matt Exp $")
#define Invalidate_I_cache(reg) \
mcr p15, 0, reg, c7, c5, 0 /* Invalidate Entire I cache */
@@ -109,6 +109,9 @@
/* Move into supervisor mode and disable IRQs/FIQs. */
cpsid if, #PSR_SVC32_MODE
+ ldr r4, .Luboot_args
+ stmia r4, {r0-r3}
+
/*
* Set up a preliminary mapping in the MMU to allow us to run
* at KERNEL_BASE with caches on.
@@ -216,6 +219,8 @@
/* NOTREACHED */
+.Luboot_args:
+ .word uboot_args
Ll1_s_frame:
.word L1_S_FRAME
Ltemp_l1_table:
diff -r 88306f156fa7 -r 6f0828ea45b0 sys/arch/evbarm/conf/PANDABOARD
--- a/sys/arch/evbarm/conf/PANDABOARD Tue Sep 04 22:58:35 2012 +0000
+++ b/sys/arch/evbarm/conf/PANDABOARD Wed Sep 05 00:06:21 2012 +0000
@@ -1,5 +1,5 @@
#
-# $NetBSD: PANDABOARD,v 1.1 2012/09/01 00:22:13 matt Exp $
+# $NetBSD: PANDABOARD,v 1.2 2012/09/05 00:06:21 matt Exp $
#
# PANDABOARD -- TI OMAP 4430 Eval Board Kernel
#
@@ -136,7 +136,7 @@
#options DEBUG
#options PMAP_DEBUG # Enable pmap_debug_level code
#options IPKDB # remote kernel debugging
-options VERBOSE_INIT_ARM # verbose bootstraping messages
+#options VERBOSE_INIT_ARM # verbose bootstraping messages
options DDB # in-kernel debugger
options DDB_ONPANIC=1
options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
@@ -171,6 +171,7 @@
# A9 core devices
armperiph0 at mainbus?
+arml2cc0 at armperiph? # L2 Cache Controller
armgic0 at armperiph? # Interrupt Controller
a9tmr0 at armperiph? # Global Timer
a9wdt0 at armperiph? # Watchdog
@@ -185,7 +186,7 @@
obio0 at mainbus? base 0x4a000000 size 0x1000000 # L4 CORE (CFG)
obio1 at mainbus? base 0x4a300000 size 0x0040000 # L4 WAKEUP
obio2 at mainbus? base 0x48000000 size 0x1000000 # L4 PERIPHERAL
-#obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE
+obio3 at mainbus? base 0x49000000 size 0x1000000 # L4 ABE
# General Purpose Memory Controller
gpmc0 at mainbus? base 0x50000000
@@ -221,9 +222,8 @@
#omapmputmr2 at obio2 addr 0x48036000 intr 72 # GP Timer 4 L4PER
#options OMAP_MPU_TIMER_CLOCK_FREQ=12000000
-# Watchdog timers
+# Watchdog timers (no WDT1)
#omapwdt32k* at obio3 addr 0x49030000 size 2048 # WDT3
-#omapwdt32k* at obio1 addr 0x4830c000 size 2048 # WDT1
#omapwdt32k* at obio1 addr 0x4a314000 size 2048 # WDT2
# onboard video
@@ -250,24 +250,26 @@
#pseudo-device wsfont
# Power, Reset and Clock Management
-prcm* at obio1 addr 0x48306000 size 0x2000 # PRM Module
+prcm* at obio1 addr 0x4A306000 size 0x2000 # PRM Module
# On-board USB
-#ehci* at obio0 addr 0x48064800 size 0x0400 intr 109
-#ohci* at obio0 addr 0x48064400 size 0x0400 intr 108
-#usb* at ohci?
-#usb* at ehci?
-#uhub* at usb?
-#uhub* at uhub? port ?
-#umass* at uhub? port ? configuration ? interface ?
-#wd* at umass?
+ohci* at obio0 addr 0x4A064800 size 0x0400 intr 108 # 76 + 32
+ehci* at obio0 addr 0x4A064c00 size 0x0400 intr 109 # 77 + 32
+usb* at ohci?
+usb* at ehci?
+uhub* at usb?
+uhub* at uhub? port ?
+umass* at uhub? port ? configuration ? interface ?
+scsibus* at scsi?
+sd* at scsibus? target ? lun ?
+wd* at umass?
#uhidev* at uhub?
#ukbd* at uhidev?
#ums* at uhidev?
#wskbd* at ukbd?
#wsmouse* at ums?
-#axe* at uhub? port ? configuration ? interface ?
+axe* at uhub? port ? configuration ? interface ?
# Hardware clocking and power management
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