[src/trunk]: src/sys/dev/usb Add register information for the EHCI 1.0 Append...

[jakllsch <jakllsch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/035009b457a2
branches:  trunk
changeset: 754914:035009b457a2
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Sat May 15 20:47:23 2010 +0000

description:
Add register information for the EHCI 1.0 Appendix C Debug Port.

diffstat:

 sys/dev/usb/ehcireg.h |  33 ++++++++++++++++++++++++++++++++-
 1 files changed, 32 insertions(+), 1 deletions(-)

diffs (45 lines):

diff -r f58949f43dec -r 035009b457a2 sys/dev/usb/ehcireg.h
--- a/sys/dev/usb/ehcireg.h     Sat May 15 20:45:43 2010 +0000
+++ b/sys/dev/usb/ehcireg.h     Sat May 15 20:47:23 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ehcireg.h,v 1.29 2008/11/28 17:18:21 jmorse Exp $      */
+/*     $NetBSD: ehcireg.h,v 1.30 2010/05/15 20:47:23 jakllsch Exp $    */
 
 /*
  * Copyright (c) 2001, 2004 The NetBSD Foundation, Inc.
@@ -322,4 +322,35 @@
 } ehci_fstn_t;
 #define EHCI_FSTN_ALIGN 32
 
+/* Debug Port */
+#define PCI_CAP_DEBUGPORT_OFFSET __BITS(28,16)
+#define PCI_CAP_DEBUGPORT_BAR  __BITS(31,29)
+/* Debug Port Registers, offset into DEBUGPORT_BAR at DEBUGPORT_OFFSET */
+#define EHCI_DEBUG_SC          0x00
+/* Status/Control Register */
+#define  EHCI_DSC_DATA_LENGTH  __BITS(3,0)
+#define  EHCI_DSC_WRITE                __BIT(4)
+#define  EHCI_DSC_GO           __BIT(5)
+#define  EHCI_DSC_ERROR                __BIT(6)
+#define  EHCI_DSC_EXCEPTION    __BITS(9,7)
+#define   EHCI_DSC_EXCEPTION_NONE      0
+#define   EHCI_DSC_EXCEPTION_XACT      1
+#define   EHCI_DSC_EXCEPTION_HW                2
+#define  EHCI_DSC_IN_USE       __BIT(10)
+#define  EHCI_DSC_DONE         __BIT(16)
+#define  EHCI_DSC_ENABLED      __BIT(28)
+#define  EHCI_DSC_OWNER                __BIT(30)
+#define EHCI_DEBUG_UPR         0x04
+/* USB PIDs Register */
+#define  EHCI_DPR_TOKEN                __BITS(7,0)
+#define  EHCI_DPR_SEND         __BITS(15,8)
+#define  EHCI_DPR_RECIEVED     __BITS(23,16)
+/* Data Registers */
+#define EHCI_DEBUG_DATA0123    0x08
+#define EHCI_DEBUG_DATA4567    0x0c
+#define EHCI_DEBUG_DAR         0x10
+/* Device Address Register */
+#define  EHCI_DAR_ENDPOINT     __BITS(3,0)
+#define  EHCI_DAR_ADDRESS      __BITS(14,8)
+
 #endif /* _DEV_PCI_EHCIREG_H_ */