[src/trunk]: src/sys/arch/arm Add __BITS to asm.h (remove from imxuartreg.h)

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d78e98efe71b
branches:  trunk
changeset: 781347:d78e98efe71b
user:      matt <matt%NetBSD.org@localhost>
date:      Sat Sep 01 14:46:25 2012 +0000

description:
Add __BITS to asm.h  (remove from imxuartreg.h)
Add L1_S_AP_KR to genassym.h
Use L1_S_AP_* in omap_start.S and don't include pmap.h

diffstat:

 sys/arch/arm/arm32/genassym.cf |   3 ++-
 sys/arch/arm/imx/imxuartreg.h  |   9 +--------
 sys/arch/arm/include/asm.h     |   3 ++-
 sys/arch/arm/omap/omap_start.S |  10 ++++------
 4 files changed, 9 insertions(+), 16 deletions(-)

diffs (93 lines):

diff -r c3d124752c00 -r d78e98efe71b sys/arch/arm/arm32/genassym.cf
--- a/sys/arch/arm/arm32/genassym.cf    Sat Sep 01 14:44:42 2012 +0000
+++ b/sys/arch/arm/arm32/genassym.cf    Sat Sep 01 14:46:25 2012 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.52 2012/08/31 23:59:51 matt Exp $
+#      $NetBSD: genassym.cf,v 1.53 2012/09/01 14:46:25 matt Exp $
 
 # Copyright (c) 1982, 1990 The Regents of the University of California.
 # All rights reserved.
@@ -92,6 +92,7 @@
 define L1_S_SIZE               L1_S_SIZE
 define L1_S_B                  L1_S_B
 define L1_S_C                  L1_S_C
+define L1_S_AP_KR              L1_S_AP(AP_KR)
 define L1_S_AP_KRW             L1_S_AP(AP_KRW)
 define L1_S_APv7_KRW           L1_S_AP(AP7_KRW)
 define L1_TABLE_SIZE           L1_TABLE_SIZE
diff -r c3d124752c00 -r d78e98efe71b sys/arch/arm/imx/imxuartreg.h
--- a/sys/arch/arm/imx/imxuartreg.h     Sat Sep 01 14:44:42 2012 +0000
+++ b/sys/arch/arm/imx/imxuartreg.h     Sat Sep 01 14:46:25 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuartreg.h,v 1.4 2010/11/13 06:12:17 bsh Exp $ */
+/* $NetBSD: imxuartreg.h,v 1.5 2012/09/01 14:46:25 matt Exp $ */
 /*
  * register definitions for Freescale i.MX31 and i.MX31L UARTs
  *
@@ -18,13 +18,6 @@
 #ifndef        _IMXUARTREG_H
 #define        _IMXUARTREG_H
 
-#ifdef __ASSEMBLER__
-#define        __BIT(n)        (1<<(n))
-#define        __BITS(hi,lo)   ((~((~0)<<((hi)+1)))&((~0)<<(lo)))
-#else
-#include <sys/cdefs.h>
-#endif
-
 /*
  * Registers are 32 bits wide; the 16 MSBs are unused --
  * they read as zeros and are ignored on write.
diff -r c3d124752c00 -r d78e98efe71b sys/arch/arm/include/asm.h
--- a/sys/arch/arm/include/asm.h        Sat Sep 01 14:44:42 2012 +0000
+++ b/sys/arch/arm/include/asm.h        Sat Sep 01 14:46:25 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: asm.h,v 1.15 2012/08/29 22:25:05 matt Exp $    */
+/*     $NetBSD: asm.h,v 1.16 2012/09/01 14:46:25 matt Exp $    */
 
 /*
  * Copyright (c) 1990 The Regents of the University of California.
@@ -40,6 +40,7 @@
 #include <arm/cdefs.h>
 
 #define        __BIT(n)        (1 << (n))
+#define __BITS(hi,lo)  ((~((~0)<<((hi)+1)))&((~0)<<(lo)))
 
 #define _C_LABEL(x)    x
 #define        _ASM_LABEL(x)   x
diff -r c3d124752c00 -r d78e98efe71b sys/arch/arm/omap/omap_start.S
--- a/sys/arch/arm/omap/omap_start.S    Sat Sep 01 14:44:42 2012 +0000
+++ b/sys/arch/arm/omap/omap_start.S    Sat Sep 01 14:46:25 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: omap_start.S,v 1.4 2011/06/30 20:09:20 wiz Exp $ */
+/*     $NetBSD: omap_start.S,v 1.5 2012/09/01 14:46:25 matt Exp $ */
 
 /*
  * Machine dependent startup code for OMAP boards.
@@ -88,8 +88,6 @@
 
 #include <machine/asm.h>
 #include <arm/armreg.h>
-#undef DOMAIN_CLIENT   /* assym.h defines as 1, but pte.h defines as 0x01 */
-#include <arm/arm32/pmap.h>
 #include <arm/omap/omap_reg.h>
 
 /*
@@ -228,14 +226,14 @@
        /* Map SDRAM where we're executing from VA==PA, read-only */
        MMU_INIT(KERNEL_BASE_phys, KERNEL_BASE_phys,
                1,
-               L1_S_PROTO | L1_S_AP(AP_KR))
+               L1_S_PROTO | L1_S_AP_KR)
        /* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable */
        MMU_INIT(KERNEL_BASE, KERNEL_BASE_phys,
                (MEMSIZE_BYTES + L1_S_SIZE - 1) / L1_S_SIZE,
-               L1_S_PROTO | L1_S_AP(AP_KRW) | L1_S_B | L1_S_C)
+               L1_S_PROTO | L1_S_AP_KRW | L1_S_B | L1_S_C)
        /* Map TIPB VA==PA so peripherals will work. */
        MMU_INIT(OMAP_TIPB_PBASE, OMAP_TIPB_PBASE,
                (OMAP_TIPB_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
-               L1_S_PROTO | L1_S_AP(AP_KRW))
+               L1_S_PROTO | L1_S_AP_KRW)
        /* end of table */
        MMU_INIT(0, 0, 0, 0)