[src/trunk]: src/sys/arch/arm/include Add ttbr/ttbr1/ttbcr registers

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/13d7241db5e2
branches:  trunk
changeset: 781434:13d7241db5e2
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Sep 06 02:05:46 2012 +0000

description:
Add ttbr/ttbr1/ttbcr registers

diffstat:

 sys/arch/arm/include/armreg.h |  10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diffs (24 lines):

diff -r 65e488f7998d -r 13d7241db5e2 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Thu Sep 06 02:03:01 2012 +0000
+++ b/sys/arch/arm/include/armreg.h     Thu Sep 06 02:05:46 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.62 2012/08/31 12:01:15 matt Exp $ */
+/*     $NetBSD: armreg.h,v 1.63 2012/09/06 02:05:46 matt Exp $ */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -566,8 +566,12 @@
 ARMREG_READ_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
 ARMREG_WRITE_INLINE(csselr, "p15,2,%0,c0,c0,0") /* Cache Size Selection Register */
 /* c2 registers */
-ARMREG_READ_INLINE(ttbr, "p15,0,%0,c2,c0,2") /* Translation Table Base Register */
-ARMREG_WRITE_INLINE(ttbr, "p15,0,%0,c2,c0,2") /* Translation Table Base Register */
+ARMREG_READ_INLINE(ttbr, "p15,0,%0,c2,c0,0") /* Translation Table Base Register 0 */
+ARMREG_WRITE_INLINE(ttbr, "p15,0,%0,c2,c0,0") /* Translation Table Base Register 0 */
+ARMREG_READ_INLINE(ttbr1, "p15,0,%0,c2,c0,1") /* Translation Table Base Register 1 */
+ARMREG_WRITE_INLINE(ttbr1, "p15,0,%0,c2,c0,1") /* Translation Table Base Register 1 */
+ARMREG_READ_INLINE(ttbcr, "p15,0,%0,c2,c0,2") /* Translation Table Base Register */
+ARMREG_WRITE_INLINE(ttbcr, "p15,0,%0,c2,c0,2") /* Translation Table Base Register */
 /* c9 registers */
 ARMREG_READ_INLINE(pmcr, "p15,0,%0,c9,c12,0") /* PMC Control Register */
 ARMREG_WRITE_INLINE(pmcr, "p15,0,%0,c9,c12,0") /* PMC Control Register */