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[src/trunk]: src/sys/arch Make cpl, ipending, and intr_depth per CPU values.
details: https://anonhg.NetBSD.org/src/rev/e5a65dc7114e
branches: trunk
changeset: 753511:e5a65dc7114e
user: skrll <skrll%NetBSD.org@localhost>
date: Wed Mar 31 12:56:14 2010 +0000
description:
Make cpl, ipending, and intr_depth per CPU values.
diffstat:
sys/arch/hp700/hp700/genassym.cf | 5 +-
sys/arch/hp700/hp700/intr.c | 63 +++++++++++++++++++--------------------
sys/arch/hp700/hp700/locore.S | 38 +++++++++++++++--------
sys/arch/hp700/include/cpu.h | 8 +++-
sys/arch/hp700/include/intr.h | 26 ++-------------
sys/arch/hppa/hppa/machdep.h | 3 +-
sys/arch/hppa/hppa/trap.c | 22 +++++++------
7 files changed, 81 insertions(+), 84 deletions(-)
diffs (truncated from 440 to 300 lines):
diff -r a6ab72aa767c -r e5a65dc7114e sys/arch/hp700/hp700/genassym.cf
--- a/sys/arch/hp700/hp700/genassym.cf Wed Mar 31 12:17:01 2010 +0000
+++ b/sys/arch/hp700/hp700/genassym.cf Wed Mar 31 12:56:14 2010 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.22 2010/03/30 19:38:52 skrll Exp $
+# $NetBSD: genassym.cf,v 1.23 2010/03/31 12:56:14 skrll Exp $
# $OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $
@@ -85,7 +85,8 @@
export INT_REG_BIT_REG
# struct cpu_info fields
-#define CI_CPL offsetof(struct cpu_info, ci_cpl)
+define CI_CPL offsetof(struct cpu_info, ci_cpl)
+define CI_IPENDING offsetof(struct cpu_info, ci_ipending)
#define CI_INTR_DEPTH offsetof(struct cpu_info, ci_intr_depth)
#define CI_SOFTLWPS offsetof(struct cpu_info, ci_softlwps)
define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
diff -r a6ab72aa767c -r e5a65dc7114e sys/arch/hp700/hp700/intr.c
--- a/sys/arch/hp700/hp700/intr.c Wed Mar 31 12:17:01 2010 +0000
+++ b/sys/arch/hp700/hp700/intr.c Wed Mar 31 12:56:14 2010 +0000
@@ -1,4 +1,6 @@
-/* $NetBSD: intr.c,v 1.23 2010/03/24 12:38:55 skrll Exp $ */
+/* $NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $ */
+/* $NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $ */
+/* $OpenBSD: intr.c,v 1.27 2009/12/31 12:52:35 jsing Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -34,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.23 2010/03/24 12:38:55 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $");
#define __MUTEX_PRIVATE
@@ -57,18 +59,9 @@
/* The priority level masks. */
int imask[NIPL];
-/* The current priority level. */
-volatile int cpl;
-
-/* The pending interrupts. */
-volatile int ipending;
-
/* Shared interrupts */
int ishared;
-/* Nonzero iff we are running an interrupt. */
-u_int hppa_intr_depth;
-
/* The list of all interrupt registers. */
struct hp700_int_reg *hp700_int_regs[HP700_INT_BITS];
@@ -137,6 +130,7 @@
void
hp700_intr_bootstrap(void)
{
+ struct cpu_info *ci = curcpu();
int i;
/* Initialize all prority level masks to mask everything. */
@@ -144,13 +138,13 @@
imask[i] = -1;
/* We are now at the highest priority level. */
- cpl = -1;
+ ci->ci_cpl = -1;
/* There are no pending interrupts. */
- ipending = 0;
+ ci->ci_ipending = 0;
/* We are not running an interrupt. */
- hppa_intr_depth = 0;
+ ci->ci_intr_depth = 0;
/* There are no interrupt handlers. */
memset(hp700_int_bits, 0, sizeof(hp700_int_bits));
@@ -277,10 +271,11 @@
void
hp700_intr_init(void)
{
+ struct hp700_int_bit *int_bit;
+ struct hp700_int_reg *int_reg;
+ struct cpu_info *ci = curcpu();
int idx, bit_pos;
- struct hp700_int_bit *int_bit;
int mask;
- struct hp700_int_reg *int_reg;
int eiem;
/*
@@ -339,8 +334,8 @@
* Because we're paranoid, we force these values for cpl and ipending,
* even though they should be unchanged since hp700_intr_bootstrap().
*/
- cpl = -1;
- ipending = 0;
+ ci->ci_cpl = -1;
+ ci->ci_ipending = 0;
eiem = 0;
for (idx = 0; idx < HP700_INT_BITS; idx++) {
int_reg = hp700_int_regs[idx];
@@ -374,6 +369,7 @@
int i;
struct hp700_int_reg *int_reg;
int hp700_intr_ipending_new(struct hp700_int_reg *, int);
+ struct cpu_info *ci = curcpu();
extern char ucas_ras_start[];
extern char ucas_ras_end[];
@@ -418,11 +414,12 @@
*/
mfctl(CR_EIRR, eirr);
mtctl(eirr, CR_EIRR);
- ipending |= hp700_intr_ipending_new(&int_reg_cpu, eirr);
+
+ ci->ci_ipending |= hp700_intr_ipending_new(&int_reg_cpu, eirr);
/* If we have interrupts to dispatch, do so. */
- if (ipending & ~cpl)
- hp700_intr_dispatch(cpl, frame->tf_eiem, frame);
+ if (ci->ci_ipending & ~ci->ci_cpl)
+ hp700_intr_dispatch(ci->ci_cpl, frame->tf_eiem, frame);
/* We are done if there are no shared interrupts. */
if (ishared == 0)
@@ -439,15 +436,15 @@
ipending_new = *int_reg->int_reg_level;
while (ipending_new != 0) {
pending = ffs(ipending_new) - 1;
- ipending |= int_reg->int_reg_bits_map[31 ^ pending]
- & ishared;
+ ci->ci_ipending |=
+ int_reg->int_reg_bits_map[31 ^ pending] & ishared;
ipending_new &= ~(1 << pending);
}
}
/* If we still have interrupts to dispatch, do so. */
- if (ipending & ~cpl)
- hp700_intr_dispatch(cpl, frame->tf_eiem, frame);
+ if (ci->ci_ipending & ~ci->ci_cpl)
+ hp700_intr_dispatch(ci->ci_cpl, frame->tf_eiem, frame);
}
/*
@@ -457,6 +454,7 @@
void
hp700_intr_dispatch(int ncpl, int eiem, struct trapframe *frame)
{
+ struct cpu_info *ci = curcpu();
int ipending_run;
u_int old_hppa_intr_depth;
int bit_pos;
@@ -466,13 +464,13 @@
int handled;
/* Increment our depth, grabbing the previous value. */
- old_hppa_intr_depth = hppa_intr_depth++;
+ old_hppa_intr_depth = ci->ci_intr_depth++;
/* Loop while we have interrupts to dispatch. */
for (;;) {
/* Read ipending and mask it with ncpl. */
- ipending_run = (ipending & ~ncpl);
+ ipending_run = (ci->ci_ipending & ~ncpl);
if (ipending_run == 0)
break;
@@ -502,8 +500,8 @@
* the level required to run this interrupt,
* and reenable interrupts.
*/
- ipending &= ~(1 << bit_pos);
- cpl = ncpl | int_bit->int_bit_spl;
+ ci->ci_ipending &= ~(1 << bit_pos);
+ ci->ci_cpl = ncpl | int_bit->int_bit_spl;
mtctl(eiem, CR_EIEM);
/* Count and dispatch the interrupt. */
@@ -520,17 +518,18 @@
}
/* Interrupts are disabled again, restore cpl and the depth. */
- cpl = ncpl;
- hppa_intr_depth = old_hppa_intr_depth;
+ ci->ci_cpl = ncpl;
+ ci->ci_intr_depth = old_hppa_intr_depth;
}
bool
cpu_intr_p(void)
{
+ struct cpu_info *ci = curcpu();
#ifdef __HAVE_FAST_SOFTINTS
#error this should not count fast soft interrupts
#else
- return hppa_intr_depth != 0;
+ return ci->ci_intr_depth != 0;
#endif
}
diff -r a6ab72aa767c -r e5a65dc7114e sys/arch/hp700/hp700/locore.S
--- a/sys/arch/hp700/hp700/locore.S Wed Mar 31 12:17:01 2010 +0000
+++ b/sys/arch/hp700/hp700/locore.S Wed Mar 31 12:56:14 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.44 2010/03/16 16:20:19 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.45 2010/03/31 12:56:14 skrll Exp $ */
/* $OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $ */
/*
@@ -534,15 +534,28 @@
EXIT(pdc_call)
/*
+ * int splraise(int ncpl);
+ */
+LEAF_ENTRY(splraise)
+ mfctl CR_CURLWP, %t1
+ ldw L_CPU(%t1),%t1
+ ldw CI_CPL(%t1), %ret0
+ or %ret0, %arg0, %arg0
+ bv %r0(%rp)
+ stw %arg0, CI_CPL(%t1)
+EXIT(splraise)
+
+/*
* int spllower(int ncpl);
*/
-ENTRY(spllower,64)
- ldil L%ipending, %r1
- ldw R%ipending(%r1), %r1 ; load ipending
- ldil L%cpl, %t1
+ENTRY(spllower,HPPA_FRAME_SIZE)
+ mfctl CR_CURLWP, %t1
+ ldw L_CPU(%t1),%t1
+
+ ldw CI_IPENDING(%t1), %r1 ; load ipending
andcm,<> %r1, %arg0, %r1 ; and with complement of new cpl
bv %r0(%rp)
- stw %arg0, R%cpl(%t1) ; store new cpl
+ stw %arg0, CI_CPL(%t1) ; store new cpl
/*
* Dispatch interrupts. There's a chance
@@ -555,8 +568,7 @@
mfctl %eiem, %arg1
mtctl %r0, %eiem ; disable interrupts
- ldil L%ipending, %r1
- ldw R%ipending(%r1), %r1 ; load ipending
+ ldw CI_IPENDING(%t1), %r1 ; load ipending
andcm,<> %r1, %arg0, %r1 ; and with complement of new cpl
b,n spllower_out ; branch if we got beaten
@@ -603,14 +615,14 @@
* void hp700_intr_schedule(int mask);
*/
ENTRY(hp700_intr_schedule,0)
- ldil L%ipending, %t1
- ldil L%cpl, %t2
+ mfctl CR_CURLWP, %t1
+ ldw L_CPU(%t1),%t2
mfctl %eiem, %arg1
mtctl %r0, %eiem ; disable interrupts
- ldw R%ipending(%t1), %r1 ; load ipending
+ ldw CI_IPENDING(%t1), %r1 ; load ipending
or %r1, %arg0, %r1 ; or in mask
- stw %r1, R%ipending(%t1) ; store ipending
- ldw R%cpl(%t2), %arg0 ; load cpl
+ stw %r1, CI_IPENDING(%t1) ; store ipending
+ ldw CI_CPL(%t2), %arg0 ; load cpl
andcm,= %r1, %arg0, %r1 ; and ipending with ~cpl
b,n spllower_dispatch ; dispatch if we can
bv %r0(%rp)
diff -r a6ab72aa767c -r e5a65dc7114e sys/arch/hp700/include/cpu.h
--- a/sys/arch/hp700/include/cpu.h Wed Mar 31 12:17:01 2010 +0000
+++ b/sys/arch/hp700/include/cpu.h Wed Mar 31 12:56:14 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.41 2010/03/31 06:35:12 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.42 2010/03/31 12:56:14 skrll Exp $ */
/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */
@@ -228,10 +228,12 @@
int ci_mtx_count;
int ci_mtx_oldspl;
int ci_want_resched;
+
+ volatile int ci_cpl;
+ volatile int ci_ipending; /* The pending interrupts. */
+ u_int ci_intr_depth; /* Nonzero iff running an interrupt. */
};
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