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[src/matt-nb6-plus]: src/sys/dev/pci Add LCSR definitions and NVM storage sub...
details: https://anonhg.NetBSD.org/src/rev/8524fd7dba95
branches: matt-nb6-plus
changeset: 774509:8524fd7dba95
user: matt <matt%NetBSD.org@localhost>
date: Wed Nov 28 22:31:47 2012 +0000
description:
Add LCSR definitions and NVM storage subclass.
diffstat:
sys/dev/pci/pcireg.h | 14 +++++++++++++-
1 files changed, 13 insertions(+), 1 deletions(-)
diffs (35 lines):
diff -r 1fdb31bf637b -r 8524fd7dba95 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Wed Nov 28 02:25:43 2012 +0000
+++ b/sys/dev/pci/pcireg.h Wed Nov 28 22:31:47 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.73 2011/08/17 00:59:47 dyoung Exp $ */
+/* $NetBSD: pcireg.h,v 1.73.10.1 2012/11/28 22:31:47 matt Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -179,6 +179,7 @@
#define PCI_SUBCLASS_MASS_STORAGE_ATA 0x05
#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06
#define PCI_SUBCLASS_MASS_STORAGE_SAS 0x07
+#define PCI_SUBCLASS_MASS_STORAGE_NVM 0x08
#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80
/* 0x02 network subclasses */
@@ -656,6 +657,17 @@
#define PCI_PCIE_LCSR 0x10 /* Link Control & Status Register */
#define PCI_PCIE_LCSR_ASPM_L0S __BIT(0)
#define PCI_PCIE_LCSR_ASPM_L1 __BIT(1)
+#define PCI_PCIE_LCSR_RCB __BIT(3)
+#define PCI_PCIE_LCSR_LINK_DIS __BIT(4)
+#define PCI_PCIE_LCSR_RETRAIN __BIT(5)
+#define PCI_PCIE_LCSR_COMCLKCFG __BIT(6)
+#define PCI_PCIE_LCSR_EXTNDSYNC __BIT(7)
+#define PCI_PCIE_LCSR_ENCLKPM __BIT(8)
+#define PCI_PCIE_LCSR_LINKSPEED __BITS(19,16)
+#define PCI_PCIE_LCSR_NLW __BITS(25,20)
+#define PCI_PCIE_LCSR_LINKTRAIN __BIT(27)
+#define PCI_PCIE_LCSR_SLOTCLKCFG __BIT(28)
+#define PCI_PCIE_LCSR_DLACTIVE __BIT(29)
#define PCI_PCIE_SLCAP 0x14 /* Slot Capabilities Register */
#define PCI_PCIE_SLCAP_ABP __BIT(0) /* Attention Button Present */
#define PCI_PCIE_SLCAP_PCP __BIT(1) /* Power Controller Present */
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