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[src/trunk]: src/sys/arch/evbarm Rename register values. No functional change...
details: https://anonhg.NetBSD.org/src/rev/e3da4807a4ac
branches: trunk
changeset: 779265:e3da4807a4ac
user: skrll <skrll%NetBSD.org@localhost>
date: Mon May 14 19:40:06 2012 +0000
description:
Rename register values. No functional change - same code before and after.
Existing names are prefixed with PL01X_ where they're common between the
PL010 and the PL011. The PL010_/PL011_ prefixes are added where they're
found only on the respective chips.
diffstat:
sys/arch/evbarm/dev/plcom.c | 163 +++++++++++++++++------------------
sys/arch/evbarm/dev/plcomreg.h | 118 ++++++++++++++++---------
sys/arch/evbarm/ifpga/plcom_ifpga.c | 12 +-
3 files changed, 160 insertions(+), 133 deletions(-)
diffs (truncated from 709 to 300 lines):
diff -r 3b2e006b84a0 -r e3da4807a4ac sys/arch/evbarm/dev/plcom.c
--- a/sys/arch/evbarm/dev/plcom.c Mon May 14 11:45:16 2012 +0000
+++ b/sys/arch/evbarm/dev/plcom.c Mon May 14 19:40:06 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: plcom.c,v 1.34 2012/04/06 01:47:16 bsh Exp $ */
+/* $NetBSD: plcom.c,v 1.35 2012/05/14 19:40:06 skrll Exp $ */
/*-
* Copyright (c) 2001 ARM Ltd
@@ -94,7 +94,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.34 2012/04/06 01:47:16 bsh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.35 2012/05/14 19:40:06 skrll Exp $");
#include "opt_plcom.h"
#include "opt_ddb.h"
@@ -289,17 +289,17 @@
printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
sc->sc_dev.dv_xname, str,
ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
- ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-",
+ ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-",
ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
- ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
+ ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-",
sc->sc_tx_stopped ? "+" : "-");
printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n",
sc->sc_dev.dv_xname, str,
ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
- ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-",
+ ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-",
ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
- ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
+ ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-",
sc->sc_rx_flags);
}
#endif
@@ -313,19 +313,19 @@
/* Disable the UART. */
bus_space_write_1(iot, ioh, plcom_cr, 0);
/* Make sure the FIFO is off. */
- bus_space_write_1(iot, ioh, plcom_lcr, LCR_8BITS);
+ bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS);
/* Disable interrupts. */
bus_space_write_1(iot, ioh, plcom_iir, 0);
/* Make sure we swallow anything in the receiving register. */
data = bus_space_read_1(iot, ioh, plcom_dr);
- if (bus_space_read_1(iot, ioh, plcom_lcr) != LCR_8BITS)
+ if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS)
return 0;
- data = bus_space_read_1(iot, ioh, plcom_fr) & (FR_RXFF | FR_RXFE);
+ data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE);
- if (data != FR_RXFE)
+ if (data != PL01X_FR_RXFE)
return 0;
return 1;
@@ -339,9 +339,9 @@
/* Turn on line break interrupt, set carrier. */
s = splserial();
PLCOM_LOCK(sc);
- sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN;
+ sc->sc_cr = PL010_CR_RIE | PL010_CR_RTIE | PL01X_CR_UARTEN;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
- SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
+ SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
/* XXX device_unit() abuse */
sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(&sc->sc_dev),
sc->sc_mcr);
@@ -375,7 +375,7 @@
SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
/* Must re-enable the console immediately, or we will
hang when trying to print. */
- sc->sc_cr = CR_UARTEN;
+ sc->sc_cr = PL01X_CR_UARTEN;
}
bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr);
@@ -562,7 +562,7 @@
/* Turn off interrupts. */
if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE))
/* interrupt on break */
- sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN;
+ sc->sc_cr = PL010_CR_RIE | PL010_CR_RTIE | PL01X_CR_UARTEN;
else
sc->sc_cr = 0;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
@@ -636,7 +636,7 @@
/* Turn on interrupts. */
/* IER_ERXRDY | IER_ERLS | IER_EMSC; */
- sc->sc_cr = CR_RIE | CR_RTIE | CR_MSIE | CR_UARTEN;
+ sc->sc_cr = PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE | PL01X_CR_UARTEN;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr);
/* Fetch the current modem control status, needed later. */
@@ -919,20 +919,20 @@
break;
case PPS_CAPTUREASSERT:
- sc->sc_ppsmask = MSR_DCD;
- sc->sc_ppsassert = MSR_DCD;
+ sc->sc_ppsmask = PL01X_MSR_DCD;
+ sc->sc_ppsassert = PL01X_MSR_DCD;
sc->sc_ppsclear = -1;
break;
case PPS_CAPTURECLEAR:
- sc->sc_ppsmask = MSR_DCD;
+ sc->sc_ppsmask = PL01X_MSR_DCD;
sc->sc_ppsassert = -1;
sc->sc_ppsclear = 0;
break;
case PPS_CAPTUREBOTH:
- sc->sc_ppsmask = MSR_DCD;
- sc->sc_ppsassert = MSR_DCD;
+ sc->sc_ppsmask = PL01X_MSR_DCD;
+ sc->sc_ppsassert = PL01X_MSR_DCD;
sc->sc_ppsclear = 0;
break;
@@ -964,9 +964,9 @@
* The old API has no way to specify PPS polarity.
*/
mutex_spin_enter(&timecounter_lock);
- sc->sc_ppsmask = MSR_DCD;
+ sc->sc_ppsmask = PL01X_MSR_DCD;
#ifndef PPS_TRAILING_EDGE
- sc->sc_ppsassert = MSR_DCD;
+ sc->sc_ppsassert = PL01X_MSR_DCD;
sc->sc_ppsclear = -1;
TIMESPEC_TO_TIMEVAL((struct timeval *)data,
&sc->ppsinfo.assert_timestamp);
@@ -1010,9 +1010,9 @@
{
if (onoff)
- SET(sc->sc_lcr, LCR_BRK);
+ SET(sc->sc_lcr, PL01X_LCR_BRK);
else
- CLR(sc->sc_lcr, LCR_BRK);
+ CLR(sc->sc_lcr, PL01X_LCR_BRK);
if (!sc->sc_heldchange) {
if (sc->sc_tx_busy) {
@@ -1053,9 +1053,9 @@
plcombits = 0;
if (ISSET(ttybits, TIOCM_DTR))
- SET(plcombits, MCR_DTR);
+ SET(plcombits, PL01X_MCR_DTR);
if (ISSET(ttybits, TIOCM_RTS))
- SET(plcombits, MCR_RTS);
+ SET(plcombits, PL01X_MCR_RTS);
switch (how) {
case TIOCMBIC:
@@ -1067,7 +1067,7 @@
break;
case TIOCMSET:
- CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
+ CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
SET(sc->sc_mcr, plcombits);
break;
}
@@ -1089,17 +1089,17 @@
int ttybits = 0;
plcombits = sc->sc_mcr;
- if (ISSET(plcombits, MCR_DTR))
+ if (ISSET(plcombits, PL01X_MCR_DTR))
SET(ttybits, TIOCM_DTR);
- if (ISSET(plcombits, MCR_RTS))
+ if (ISSET(plcombits, PL01X_MCR_RTS))
SET(ttybits, TIOCM_RTS);
plcombits = sc->sc_msr;
- if (ISSET(plcombits, MSR_DCD))
+ if (ISSET(plcombits, PL01X_MSR_DCD))
SET(ttybits, TIOCM_CD);
- if (ISSET(plcombits, MSR_CTS))
+ if (ISSET(plcombits, PL01X_MSR_CTS))
SET(ttybits, TIOCM_CTS);
- if (ISSET(plcombits, MSR_DSR))
+ if (ISSET(plcombits, PL01X_MSR_DSR))
SET(ttybits, TIOCM_DSR);
if (sc->sc_cr != 0)
@@ -1115,25 +1115,25 @@
switch (ISSET(cflag, CSIZE)) {
case CS5:
- SET(lcr, LCR_5BITS);
+ SET(lcr, PL01X_LCR_5BITS);
break;
case CS6:
- SET(lcr, LCR_6BITS);
+ SET(lcr, PL01X_LCR_6BITS);
break;
case CS7:
- SET(lcr, LCR_7BITS);
+ SET(lcr, PL01X_LCR_7BITS);
break;
case CS8:
- SET(lcr, LCR_8BITS);
+ SET(lcr, PL01X_LCR_8BITS);
break;
}
if (ISSET(cflag, PARENB)) {
- SET(lcr, LCR_PEN);
+ SET(lcr, PL01X_LCR_PEN);
if (!ISSET(cflag, PARODD))
- SET(lcr, LCR_EPS);
+ SET(lcr, PL01X_LCR_EPS);
}
if (ISSET(cflag, CSTOPB))
- SET(lcr, LCR_STP2);
+ SET(lcr, PL01X_LCR_STP2);
return lcr;
}
@@ -1177,7 +1177,7 @@
tp->t_cflag == t->c_cflag)
return 0;
- lcr = ISSET(sc->sc_lcr, LCR_BRK) | cflag2lcr(t->c_cflag);
+ lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag);
s = splserial();
PLCOM_LOCK(sc);
@@ -1193,7 +1193,7 @@
sc->sc_fifo = 0;
if (sc->sc_fifo)
- SET(sc->sc_lcr, LCR_FEN);
+ SET(sc->sc_lcr, PL01X_LCR_FEN);
/*
* If we're not in a mode that assumes a connection is present, then
@@ -1202,36 +1202,36 @@
if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
sc->sc_msr_dcd = 0;
else
- sc->sc_msr_dcd = MSR_DCD;
+ sc->sc_msr_dcd = PL01X_MSR_DCD;
/*
* Set the flow control pins depending on the current flow control
* mode.
*/
if (ISSET(t->c_cflag, CRTSCTS)) {
- sc->sc_mcr_dtr = MCR_DTR;
- sc->sc_mcr_rts = MCR_RTS;
- sc->sc_msr_cts = MSR_CTS;
+ sc->sc_mcr_dtr = PL01X_MCR_DTR;
+ sc->sc_mcr_rts = PL01X_MCR_RTS;
+ sc->sc_msr_cts = PL01X_MSR_CTS;
} else if (ISSET(t->c_cflag, MDMBUF)) {
/*
* For DTR/DCD flow control, make sure we don't toggle DTR for
* carrier detection.
*/
sc->sc_mcr_dtr = 0;
- sc->sc_mcr_rts = MCR_DTR;
- sc->sc_msr_cts = MSR_DCD;
+ sc->sc_mcr_rts = PL01X_MCR_DTR;
+ sc->sc_msr_cts = PL01X_MSR_DCD;
} else {
/*
* If no flow control, then always set RTS. This will make
* the other side happy if it mistakenly thinks we're doing
* RTS/CTS flow control.
*/
- sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
+ sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS;
sc->sc_mcr_rts = 0;
sc->sc_msr_cts = 0;
- if (ISSET(sc->sc_mcr, MCR_DTR))
- SET(sc->sc_mcr, MCR_RTS);
+ if (ISSET(sc->sc_mcr, PL01X_MCR_DTR))
+ SET(sc->sc_mcr, PL01X_MCR_RTS);
else
- CLR(sc->sc_mcr, MCR_RTS);
+ CLR(sc->sc_mcr, PL01X_MCR_RTS);
}
sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
@@ -1284,7 +1284,7 @@
* CLOCAL or MDMBUF. We don't hang up here; we only do that by
* explicit request.
*/
- (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
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