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[src/trunk]: src/sys/arch/mips Add support for the MIPS DSP ASE (as a second ...
details: https://anonhg.NetBSD.org/src/rev/f217b809187b
branches: trunk
changeset: 768390:f217b809187b
user: matt <matt%NetBSD.org@localhost>
date: Tue Aug 16 06:58:15 2011 +0000
description:
Add support for the MIPS DSP ASE (as a second PCU).
diffstat:
sys/arch/mips/conf/files.mips | 3 +-
sys/arch/mips/include/cpu.h | 21 +++-
sys/arch/mips/include/mipsNN.h | 10 +-
sys/arch/mips/include/pcb.h | 3 +-
sys/arch/mips/include/reg.h | 6 +-
sys/arch/mips/include/regnum.h | 13 ++-
sys/arch/mips/include/trap.h | 3 +-
sys/arch/mips/include/types.h | 5 +-
sys/arch/mips/mips/cpu_subr.c | 17 ++-
sys/arch/mips/mips/mips_dsp.c | 200 ++++++++++++++++++++++++++++++++++++++
sys/arch/mips/mips/mips_fpu.c | 11 +-
sys/arch/mips/mips/mips_machdep.c | 38 ++++++-
sys/arch/mips/mips/trap.c | 15 ++-
13 files changed, 317 insertions(+), 28 deletions(-)
diffs (truncated from 658 to 300 lines):
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/conf/files.mips
--- a/sys/arch/mips/conf/files.mips Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/conf/files.mips Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.mips,v 1.71 2011/07/31 15:39:28 matt Exp $
+# $NetBSD: files.mips,v 1.72 2011/08/16 06:58:15 matt Exp $
#
defflag opt_cputype.h NOFPU FPEMUL
@@ -47,6 +47,7 @@
file arch/mips/mips/pmap_tlb.c
file arch/mips/mips/trap.c # trap handlers
file arch/mips/mips/syscall.c # syscall entries
+file arch/mips/mips/mips_dsp.c mips32r2 | mips64r2
file arch/mips/mips/mips_fixup.c
file arch/mips/mips/mips_fpu.c
file arch/mips/mips/mips_machdep.c
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/cpu.h
--- a/sys/arch/mips/include/cpu.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/cpu.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.104 2011/07/31 15:36:28 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.105 2011/08/16 06:58:15 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -104,6 +104,8 @@
volatile u_int ci_softints;
struct evcnt ci_ev_fpu_loads; /* fpu load counter */
struct evcnt ci_ev_fpu_saves; /* fpu save counter */
+ struct evcnt ci_ev_dsp_loads; /* dsp load counter */
+ struct evcnt ci_ev_dsp_saves; /* dsp save counter */
struct evcnt ci_ev_tlbmisses;
/*
@@ -282,6 +284,7 @@
#define CPU_MIPS_HAVE_MxCR 0x2000 /* have mfcr, mtcr insns */
#define CPU_MIPS_LOONGSON2 0x4000
#define MIPS_NOT_SUPP 0x8000
+#define CPU_MIPS_HAVE_DSP 0x10000
#endif /* !_LOCORE */
@@ -300,6 +303,7 @@
# define MIPS_HAS_CLOCK 0
# define MIPS_HAS_LLSC 0
# define MIPS_HAS_LLADDR 0
+# define MIPS_HAS_DSP 0
#elif defined(MIPS3) || defined(MIPS4)
@@ -322,6 +326,7 @@
# define MIPS_HAS_LLSC (mips_options.mips_has_llsc)
# endif /* _LOCORE */
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP 0
#elif defined(MIPS32)
@@ -336,6 +341,7 @@
# define MIPS_HAS_CLOCK 1
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP 0
#elif defined(MIPS32R2)
@@ -350,6 +356,7 @@
# define MIPS_HAS_CLOCK 1
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
#elif defined(MIPS64)
@@ -364,6 +371,7 @@
# define MIPS_HAS_CLOCK 1
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP 0
#elif defined(MIPS64R2)
@@ -378,6 +386,7 @@
# define MIPS_HAS_CLOCK 1
# define MIPS_HAS_LLSC 1
# define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
#endif
@@ -388,6 +397,7 @@
#define MIPS_HAS_R4K_MMU (mips_options.mips_has_r4k_mmu)
#define MIPS_HAS_LLSC (mips_options.mips_has_llsc)
#define MIPS_HAS_LLADDR ((mips_options.mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
+# define MIPS_HAS_DSP (mips_options.mips_cpu_flags & CPU_MIPS_HAVE_DSP)
/* This test is ... rather bogus */
#define CPUISMIPS3 ((mips_options.mips_cpu_arch & \
@@ -621,12 +631,21 @@
void netintr(void);
int kdbpeek(vaddr_t);
+/* mips_dsp.c */
+void dsp_init(void);
+void dsp_discard(void);
+void dsp_load(void);
+void dsp_save(void);
+bool dsp_used_p(void);
+extern const pcu_ops_t mips_dsp_ops;
+
/* mips_fpu.c */
void fpu_init(void);
void fpu_discard(void);
void fpu_load(void);
void fpu_save(void);
bool fpu_used_p(void);
+extern const pcu_ops_t mips_fpu_ops;
/* mips_machdep.c */
void dumpsys(void);
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/mipsNN.h
--- a/sys/arch/mips/include/mipsNN.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/mipsNN.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsNN.h,v 1.4 2006/03/20 18:31:29 gdamore Exp $ */
+/* $NetBSD: mipsNN.h,v 1.5 2011/08/16 06:58:15 matt Exp $ */
/*
* Copyright 2000, 2001
@@ -233,7 +233,13 @@
/* "M" (R): Configuration Register 4 present. */
#define MIPSNN_CFG3_M 0x80000000
-/* "DSPP" (R): DSPP ASE extension present. */
+/* "ULRP" (R): UserLocal register is implemented. */
+#define MIPSNN_CFG3_ULRP 0x00002000
+
+/* "DSP2P" (R): DSP v2 ASE extension present. */
+#define MIPSNN_CFG3_DSP2P 0x00000800
+
+/* "DSPP" (R): DSP ASE extension present. */
#define MIPSNN_CFG3_DSPP 0x00000400
/* "LPA" (R): Large physical addresses implemented. (MIPS64 rev 2 only). */
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/pcb.h
--- a/sys/arch/mips/include/pcb.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/pcb.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcb.h,v 1.23 2011/02/20 07:45:47 matt Exp $ */
+/* $NetBSD: pcb.h,v 1.24 2011/08/16 06:58:15 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -60,6 +60,7 @@
void * pcb_onfault; /* for copyin/copyout faults */
uint32_t pcb_ppl; /* previous priority level */
struct fpreg pcb_fpregs; /* saved floating point registers */
+ struct dspreg pcb_dspregs; /* saved DSP registers */
struct pcb_faultinfo pcb_faultinfo;
};
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/reg.h
--- a/sys/arch/mips/include/reg.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/reg.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.14 2011/02/08 20:20:19 rmind Exp $ */
+/* $NetBSD: reg.h,v 1.15 2011/08/16 06:58:15 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -50,6 +50,10 @@
mips_fpreg_t r_regs[33];
};
+struct dspreg {
+ mips_reg_t r_regs[8];
+};
+
#if defined(__mips_n32) || defined(__mips_n64)
struct fpreg_oabi {
int32_t r_regs[33];
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/regnum.h
--- a/sys/arch/mips/include/regnum.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/regnum.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: regnum.h,v 1.10 2011/02/08 20:20:19 rmind Exp $ */
+/* $NetBSD: regnum.h,v 1.11 2011/08/16 06:58:15 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -108,7 +108,7 @@
#define _R_CAUSE 36
#define _R_PC 37
-#define _FPBASE 38
+#define _FPBASE (_R_PC + 1)
#define _R_F0 (_FPBASE+0)
#define _R_F1 (_FPBASE+1)
#define _R_F2 (_FPBASE+2)
@@ -142,3 +142,12 @@
#define _R_F30 (_FPBASE+30)
#define _R_F31 (_FPBASE+31)
#define _R_FSR (_FPBASE+32)
+
+#define _R_DSPBASE (_R_FSR + 1)
+#define _R_MULLO1 (_R_DSPBASE + 0)
+#define _R_MULHI1 (_R_DSPBASE + 1)
+#define _R_MULLO2 (_R_DSPBASE + 2)
+#define _R_MULHI2 (_R_DSPBASE + 3)
+#define _R_MULLO3 (_R_DSPBASE + 4)
+#define _R_MULHI3 (_R_DSPBASE + 5)
+#define _R_DSPCTL (_R_DSPBASE + 6)
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/trap.h
--- a/sys/arch/mips/include/trap.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/trap.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.h,v 1.17 2011/02/20 07:45:47 matt Exp $ */
+/* $NetBSD: trap.h,v 1.18 2011/08/16 06:58:15 matt Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -66,6 +66,7 @@
#define T_VCEI 14 /* Virtual coherency exception */
#define T_FPE 15 /* Floating point exception */
#define T_WATCH 23 /* Watch address reference */
+#define T_DSP 26 /* DSP exception */
#define T_VCED 31 /* Virtual coherency data */
#define T_USER 0x20 /* user-mode flag or'ed with type */
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/include/types.h
--- a/sys/arch/mips/include/types.h Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/include/types.h Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.52 2011/06/12 03:35:44 rmind Exp $ */
+/* $NetBSD: types.h,v 1.53 2011/08/16 06:58:15 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -127,7 +127,8 @@
#if defined(_KERNEL) || defined(_KMEMUSER)
#define PCU_FPU 0
-#define PCU_UNIT_COUNT 1
+#define PCU_DSP 1
+#define PCU_UNIT_COUNT 2
#endif
typedef __uint64_t __cpuset_t;
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/mips/cpu_subr.c
--- a/sys/arch/mips/mips/cpu_subr.c Tue Aug 16 06:55:11 2011 +0000
+++ b/sys/arch/mips/mips/cpu_subr.c Tue Aug 16 06:58:15 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_subr.c,v 1.13 2011/05/02 00:29:54 rmind Exp $ */
+/* $NetBSD: cpu_subr.c,v 1.14 2011/08/16 06:58:15 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.13 2011/05/02 00:29:54 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.14 2011/08/16 06:58:15 matt Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -90,6 +90,13 @@
#endif
};
+const pcu_ops_t * const pcu_ops_md_defs[PCU_UNIT_COUNT] = {
+ [PCU_FPU] = &mips_fpu_ops,
+#if (MIPS32R2 + MIPS64R2) > 0
+ [PCU_DSP] = &mips_dsp_ops,
+#endif
+};
+
#ifdef MULTIPROCESSOR
volatile __cpuset_t cpus_running = 1;
@@ -231,6 +238,12 @@
evcnt_attach_dynamic(&ci->ci_ev_fpu_saves,
EVCNT_TYPE_MISC, NULL, xname,
"fpu saves");
+ evcnt_attach_dynamic(&ci->ci_ev_dsp_loads,
+ EVCNT_TYPE_MISC, NULL, xname,
+ "dsp loads");
+ evcnt_attach_dynamic(&ci->ci_ev_dsp_saves,
+ EVCNT_TYPE_MISC, NULL, xname,
+ "dsp saves");
evcnt_attach_dynamic(&ci->ci_ev_tlbmisses,
EVCNT_TYPE_TRAP, NULL, xname,
"tlb misses");
diff -r a33d8fb06759 -r f217b809187b sys/arch/mips/mips/mips_dsp.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mips/mips/mips_dsp.c Tue Aug 16 06:58:15 2011 +0000
@@ -0,0 +1,200 @@
+/* $NetBSD: mips_dsp.c,v 1.1 2011/08/16 06:58:15 matt Exp $ */
+
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