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[src/trunk]: src/sys/dev/pci Similar to bge(4), split if_bnxreg.h in two parts:
details: https://anonhg.NetBSD.org/src/rev/c79851f6172c
branches: trunk
changeset: 759445:c79851f6172c
user: jym <jym%NetBSD.org@localhost>
date: Thu Dec 09 22:34:37 2010 +0000
description:
Similar to bge(4), split if_bnxreg.h in two parts:
- if_bnxreg.h: general register values, flags... for bnx(4), that can
be included in other drivers
- if_bnxvar.h: PCI or device specific code (device state data, debug
macros etc.), which should remain private to bnx(4)
No comments, no objections on current-users@.
See discussion:
http://mail-index.netbsd.org/current-users/2010/12/01/msg014926.html
diffstat:
sys/dev/pci/if_bnx.c | 6 +-
sys/dev/pci/if_bnxreg.h | 512 +++++------------------------------------------
sys/dev/pci/if_bnxvar.h | 440 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 499 insertions(+), 459 deletions(-)
diffs (truncated from 1065 to 300 lines):
diff -r 48711a9a1b1b -r c79851f6172c sys/dev/pci/if_bnx.c
--- a/sys/dev/pci/if_bnx.c Thu Dec 09 22:30:16 2010 +0000
+++ b/sys/dev/pci/if_bnx.c Thu Dec 09 22:34:37 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnx.c,v 1.35 2010/11/27 17:48:58 jym Exp $ */
+/* $NetBSD: if_bnx.c,v 1.36 2010/12/09 22:34:37 jym Exp $ */
/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
/*-
@@ -35,7 +35,7 @@
#if 0
__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
#endif
-__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.35 2010/11/27 17:48:58 jym Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.36 2010/12/09 22:34:37 jym Exp $");
/*
* The following controllers are supported by this driver:
@@ -60,6 +60,8 @@
#include <sys/mutex.h>
#include <dev/pci/if_bnxreg.h>
+#include <dev/pci/if_bnxvar.h>
+
#include <dev/microcode/bnx/bnxfw.h>
/****************************************************************************/
diff -r 48711a9a1b1b -r c79851f6172c sys/dev/pci/if_bnxreg.h
--- a/sys/dev/pci/if_bnxreg.h Thu Dec 09 22:30:16 2010 +0000
+++ b/sys/dev/pci/if_bnxreg.h Thu Dec 09 22:34:37 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnxreg.h,v 1.10 2010/01/19 22:07:00 pooka Exp $ */
+/* $NetBSD: if_bnxreg.h,v 1.11 2010/12/09 22:34:37 jym Exp $ */
/* $OpenBSD: if_bnxreg.h,v 1.33 2009/09/05 16:02:28 claudio Exp $ */
/*-
@@ -32,54 +32,29 @@
* $FreeBSD: src/sys/dev/bce/if_bcereg.h,v 1.4 2006/05/04 00:34:07 mjacob Exp $
*/
-#undef BNX_DEBUG
-
-#ifndef _BNX_H_DEFINED
-#define _BNX_H_DEFINED
-
-#ifdef _KERNEL_OPT
-#include "opt_inet.h"
-#endif
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/device.h>
-#include <sys/socket.h>
-#include <sys/sysctl.h>
-//#include <sys/workqueue.h>
-
-#include <net/if.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_ether.h>
-
-#ifdef INET
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/in_var.h>
-#include <netinet/ip.h>
-#include <netinet/if_inarp.h>
-#endif
-
-#include <net/if_vlanvar.h>
-
-#include <net/bpf.h>
-
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcidevs.h>
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-#include <dev/mii/miidevs.h>
-#include <dev/mii/brgphyreg.h>
-
#define ETHER_ALIGN 2
+/* General controller flags -- bnx_flags element in bnx_softc */
+#define BNX_PCIX_FLAG 0x01
+#define BNX_PCI_32BIT_FLAG 0x02
+#define BNX_ONE_TDMA_FLAG 0x04 /* Deprecated */
+#define BNX_NO_WOL_FLAG 0x08
+#define BNX_USING_DAC_FLAG 0x10
+#define BNX_USING_MSI_FLAG 0x20
+#define BNX_MFW_ENABLE_FLAG 0x40
+#define BNX_ACTIVE_FLAG 0x80
+#define BNX_ALLOC_PKTS_FLAG 0x100
+
+/* PHY specific flags -- bnx_phy_flags element in bnx_softc */
+#define BNX_PHY_SERDES_FLAG 0x001
+#define BNX_PHY_CRC_FIX_FLAG 0x002
+#define BNX_PHY_PARALLEL_DETECT_FLAG 0x004
+#define BNX_PHY_2_5G_CAPABLE_FLAG 0x008
+#define BNX_PHY_INT_MODE_MASK_FLAG 0x300
+#define BNX_PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
+#define BNX_PHY_INT_MODE_LINK_READY_FLAG 0x200
+#define BNX_PHY_IEEE_CLAUSE_45_FLAG 0x400
+
/****************************************************************************/
/* Debugging macros and definitions. */
/****************************************************************************/
@@ -675,28 +650,10 @@
#define HOST_VIEW_SHMEM_BASE 0x167c00
-/*
- * PCI registers defined in the PCI 2.2 spec.
- */
-#define BNX_PCI_BAR0 0x10
-#define BNX_PCI_PCIX_CMD 0x40
-
/****************************************************************************/
/* Convenience definitions. */
/****************************************************************************/
#define BNX_PRINTF(sc, fmt, ...) aprint_error_dev(sc->bnx_dev, fmt, __VA_ARGS__)
-
-#define REG_WR(sc, reg, val) bus_space_write_4(sc->bnx_btag, sc->bnx_bhandle, reg, val)
-#define REG_WR16(sc, reg, val) bus_space_write_2(sc->bnx_btag, sc->bnx_bhandle, reg, val)
-#define REG_RD(sc, reg) bus_space_read_4(sc->bnx_btag, sc->bnx_bhandle, reg)
-#define REG_RD_IND(sc, offset) bnx_reg_rd_ind(sc, offset)
-#define REG_WR_IND(sc, offset, val) bnx_reg_wr_ind(sc, offset, val)
-#define CTX_WR(sc, cid_addr, offset, val) bnx_ctx_wr(sc, cid_addr, offset, val)
-#define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
-#define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))
-#define PCI_SETBIT(pc, tag, reg, x) pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) | (x)))
-#define PCI_CLRBIT(pc, tag, reg, x) pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) & ~(x)))
-
#define BNX_STATS(x) (u_long) stats->stat_ ## x ## _lo
/*
@@ -718,8 +675,13 @@
u_int32_t tx_bd_haddr_hi;
u_int32_t tx_bd_haddr_lo;
u_int32_t tx_bd_mss_nbytes;
+#if BYTE_ORDER == BIG_ENDIAN
+ u_int16_t tx_bd_vlan_tag;
+ u_int16_t tx_bd_flags;
+#else
u_int16_t tx_bd_flags;
u_int16_t tx_bd_vlan_tag;
+#endif
#define TX_BD_FLAGS_CONN_FAULT (1<<0)
#define TX_BD_FLAGS_TCP_UDP_CKSUM (1<<1)
#define TX_BD_FLAGS_IP_CKSUM (1<<2)
@@ -1059,7 +1021,6 @@
#define BNX_L2CTX_RX_NX_PG_BDHADDR_LO 0x00000054
#define BNX_L2CTX_RX_NX_PG_BDIDX 0x00000058
-
/*
* pci_config_l definition
* offset: 0000
@@ -1314,7 +1275,6 @@
#define BNX_PCI_MSI_ADDR_H 0x00000454
#define BNX_PCI_MSI_ADDR_L 0x00000458
-
/*
* misc_reg definition
* offset: 0x800
@@ -4588,7 +4548,6 @@
#define DMA_WRITE_CHANS 3
/* Use the natural page size of the host CPU. */
-/* XXX: This has only been tested on amd64/i386 systems using 4KB pages. */
#define BCM_PAGE_BITS PAGE_SHIFT
#define BCM_PAGE_SIZE PAGE_SIZE
@@ -4612,7 +4571,7 @@
#define TX_CHAIN_IDX(x) ((x) & MAX_TX_BD)
-#define TX_PAGE(x) (((x) & ~USABLE_TX_BD_PER_PAGE) >> 8)
+#define TX_PAGE(x) (((x) & ~USABLE_TX_BD_PER_PAGE) >> (BCM_PAGE_BITS - 4))
#define TX_IDX(x) ((x) & USABLE_TX_BD_PER_PAGE)
#define NEXT_RX_BD(x) (((x) & USABLE_RX_BD_PER_PAGE) == \
@@ -4621,7 +4580,7 @@
#define RX_CHAIN_IDX(x) ((x) & MAX_RX_BD)
-#define RX_PAGE(x) (((x) & ~USABLE_RX_BD_PER_PAGE) >> 8)
+#define RX_PAGE(x) (((x) & ~USABLE_RX_BD_PER_PAGE) >> (BCM_PAGE_BITS - 4))
#define RX_IDX(x) ((x) & USABLE_RX_BD_PER_PAGE)
/* Context size. */
@@ -4713,6 +4672,32 @@
u_int32_t *rodata;
};
+struct bnx_rv2p_header {
+ int bnx_rv2p_proc1len;
+ int bnx_rv2p_proc2len;
+
+ /*
+ * Followed by blocks of data, each sized according to
+ * the (rather obvious) block length stated above.
+ */
+};
+
+/*
+ * The RV2P block must be configured for the system
+ * page size, or more specifically, the number of
+ * usable rx_bd's per page, and should be called
+ * as follows prior to loading the RV2P firmware:
+ *
+ * BNX_RV2P_PROC2_CHG_MAX_BD_PAGE(USABLE_RX_BD_PER_PAGE)
+ *
+ * The default value is 0xFF.
+ */
+#define BNX_RV2P_PROC2_MAX_BD_PAGE_LOC 5
+#define BNX_RV2P_PROC2_CHG_MAX_BD_PAGE(_rv2p, _v) { \
+ _rv2p[BNX_RV2P_PROC2_MAX_BD_PAGE_LOC] = \
+ (_rv2p[BNX_RV2P_PROC2_MAX_BD_PAGE_LOC] & ~0xFFFF) | (_v); \
+}
+
#define RV2P_PROC1 0
#define RV2P_PROC2 1
@@ -4743,390 +4728,3 @@
#define BNX_MAX_MRU MCLBYTES
#define BNX_MAX_JUMBO_MRU 9216
-
-/****************************************************************************/
-/* BNX Device State Data Structure */
-/****************************************************************************/
-
-#define BNX_STATUS_BLK_SZ sizeof(struct status_block)
-#define BNX_STATS_BLK_SZ sizeof(struct statistics_block)
-#define BNX_TX_CHAIN_PAGE_SZ BCM_PAGE_SIZE
-#define BNX_RX_CHAIN_PAGE_SZ BCM_PAGE_SIZE
-
-struct bnx_pkt {
- TAILQ_ENTRY(bnx_pkt) pkt_entry;
- bus_dmamap_t pkt_dmamap;
- struct mbuf *pkt_mbuf;
- u_int16_t pkt_end_desc;
-};
-
-TAILQ_HEAD(bnx_pkt_list, bnx_pkt);
-
-struct bnx_softc
-{
- device_t bnx_dev;
- struct ethercom bnx_ec;
- struct pci_attach_args bnx_pa;
-
- struct ifmedia bnx_ifmedia; /* TBI media info */
-
- bus_space_tag_t bnx_btag; /* Device bus tag */
- bus_space_handle_t bnx_bhandle; /* Device bus handle */
- bus_size_t bnx_size;
-
- void *bnx_intrhand; /* Interrupt handler */
-
- /* ASIC Chip ID. */
- u_int32_t bnx_chipid;
-
- /* General controller flags. */
- u_int32_t bnx_flags;
-#define BNX_PCIX_FLAG 0x01
-#define BNX_PCI_32BIT_FLAG 0x02
-#define BNX_ONE_TDMA_FLAG 0x04 /* Deprecated */
-#define BNX_NO_WOL_FLAG 0x08
-#define BNX_USING_DAC_FLAG 0x10
-#define BNX_USING_MSI_FLAG 0x20
-#define BNX_MFW_ENABLE_FLAG 0x40
-#define BNX_ACTIVE_FLAG 0x80
-#define BNX_ALLOC_PKTS_FLAG 0x100
-
- /* PHY specific flags. */
- u_int32_t bnx_phy_flags;
-#define BNX_PHY_SERDES_FLAG 0x001
-#define BNX_PHY_CRC_FIX_FLAG 0x002
-#define BNX_PHY_PARALLEL_DETECT_FLAG 0x004
-#define BNX_PHY_2_5G_CAPABLE_FLAG 0x008
-#define BNX_PHY_INT_MODE_MASK_FLAG 0x300
-#define BNX_PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
-#define BNX_PHY_INT_MODE_LINK_READY_FLAG 0x200
-
- /* Values that need to be shared with the PHY driver. */
- u_int32_t bnx_shared_hw_cfg;
- u_int32_t bnx_port_hw_cfg;
-
- u_int16_t bus_speed_mhz; /* PCI bus speed */
- struct flash_spec *bnx_flash_info; /* Flash NVRAM settings */
- u_int32_t bnx_flash_size; /* Flash NVRAM size */
- u_int32_t bnx_shmem_base; /* Shared Memory base address */
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