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[src/trunk]: src/sys/dev/pci abort attach if memory access is not enabled



details:   https://anonhg.NetBSD.org/src/rev/61043a36f84e
branches:  trunk
changeset: 778566:61043a36f84e
user:      macallan <macallan%NetBSD.org@localhost>
date:      Thu Apr 05 04:04:05 2012 +0000

description:
abort attach if memory access is not enabled
this avoids a panic later on when trying to attach to an unconfigured ohci
found for example in later iBooks when DIAGNOSTIC is set

diffstat:

 sys/dev/pci/ohci_pci.c |  15 ++++++++++++---
 1 files changed, 12 insertions(+), 3 deletions(-)

diffs (43 lines):

diff -r 3c35c578d047 -r 61043a36f84e sys/dev/pci/ohci_pci.c
--- a/sys/dev/pci/ohci_pci.c    Thu Apr 05 02:46:21 2012 +0000
+++ b/sys/dev/pci/ohci_pci.c    Thu Apr 05 04:04:05 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ohci_pci.c,v 1.48 2012/01/30 19:41:22 drochner Exp $   */
+/*     $NetBSD: ohci_pci.c,v 1.49 2012/04/05 04:04:05 macallan Exp $   */
 
 /*
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ohci_pci.c,v 1.48 2012/01/30 19:41:22 drochner Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ohci_pci.c,v 1.49 2012/04/05 04:04:05 macallan Exp $");
 
 #include "ehci.h"
 
@@ -96,6 +96,16 @@
 
        pci_aprint_devinfo(pa, "USB Controller");
 
+       /* check if memory space access is enabled */
+       csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+#ifdef DEBUG
+       printf("csr: %08x\n", csr);
+#endif
+       if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) {
+               aprint_error_dev(self, "memory access is disabled\n");
+               return;
+       }
+
        /* Map I/O registers */
        if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
                           &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
@@ -113,7 +123,6 @@
        sc->sc.sc_bus.dmatag = pa->pa_dmat;
 
        /* Enable the device. */
-       csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
        pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
                       csr | PCI_COMMAND_MASTER_ENABLE);
 



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