[src/trunk]: src/sys/arch/evbarm/dev Add the ifls register.

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f49fe1757173
branches:  trunk
changeset: 782266:f49fe1757173
user:      skrll <skrll%NetBSD.org@localhost>
date:      Wed Oct 24 21:23:45 2012 +0000

description:
Add the ifls register.

diffstat:

 sys/arch/evbarm/dev/plcomreg.h |  11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diffs (25 lines):

diff -r bdfcf80befc8 -r f49fe1757173 sys/arch/evbarm/dev/plcomreg.h
--- a/sys/arch/evbarm/dev/plcomreg.h    Wed Oct 24 20:14:55 2012 +0000
+++ b/sys/arch/evbarm/dev/plcomreg.h    Wed Oct 24 21:23:45 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: plcomreg.h,v 1.4 2012/07/25 07:26:17 skrll Exp $       */
+/*     $NetBSD: plcomreg.h,v 1.5 2012/10/24 21:23:45 skrll Exp $       */
 
 /*-
  * Copyright (c) 2001 ARM Ltd
@@ -106,6 +106,15 @@
 #define        PL01X_MSR_CTS           PL01X_FR_CTS
 #define        PL011_MSR_RI            PL011_FR_RI
 
+/* ifls */
+#define        PL011_IFLS_1EIGHTH      0
+#define        PL011_IFLS_1QUARTER     1
+#define        PL011_IFLS_1HALF        2
+#define        PL011_IFLS_3QUARTERS    3
+#define        PL011_IFLS_7EIGHTHS     4
+#define        PL011_IFLS_RXIFLS(x)    (((x) & 0x7) << 3)
+#define        PL011_IFLS_TXIFLS(x)    (((x) & 0x7) << 0)
+
 /* All interrupt status/clear registers */
 #define        PL011_INT_OE    0x400
 #define        PL011_INT_BE    0x200