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[src/trunk]: src/sys/arch/mips Add Broadcom BCM3302 CPU to the table.



details:   https://anonhg.NetBSD.org/src/rev/c9f789c208d2
branches:  trunk
changeset: 770692:c9f789c208d2
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Sat Oct 29 18:56:49 2011 +0000

description:
Add Broadcom BCM3302 CPU to the table.

diffstat:

 sys/arch/mips/include/cpuregs.h   |  7 ++++++-
 sys/arch/mips/mips/mips_machdep.c |  7 +++++--
 2 files changed, 11 insertions(+), 3 deletions(-)

diffs (49 lines):

diff -r bb5a17f27a2e -r c9f789c208d2 sys/arch/mips/include/cpuregs.h
--- a/sys/arch/mips/include/cpuregs.h   Sat Oct 29 18:43:58 2011 +0000
+++ b/sys/arch/mips/include/cpuregs.h   Sat Oct 29 18:56:49 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpuregs.h,v 1.87 2011/09/22 05:08:52 macallan Exp $    */
+/*     $NetBSD: cpuregs.h,v 1.88 2011/10/29 18:56:49 jakllsch Exp $    */
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -906,6 +906,11 @@
 #define        MIPS_1004K      0x99    /* MIPS 1004Kc/1004Kf           ISA 32  Rel 2 */
 
 /*
+ * CPU processor revision IDs for company ID == 2 (Broadcom)
+ */
+#define        MIPS_BCM3302    0x90    /* MIPS 4KEc_R2-like?           ISA 32  Rel 2 */
+
+/*
  * Alchemy (company ID 3) use the processor ID field to donote the CPU core
  * revision and the company options field do donate the SOC chip type.
  */
diff -r bb5a17f27a2e -r c9f789c208d2 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Sat Oct 29 18:43:58 2011 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Sat Oct 29 18:56:49 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_machdep.c,v 1.249 2011/09/22 05:08:52 macallan Exp $      */
+/*     $NetBSD: mips_machdep.c,v 1.250 2011/10/29 18:56:49 jakllsch Exp $      */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.249 2011/09/22 05:08:52 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.250 2011/10/29 18:56:49 jakllsch Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -504,6 +504,9 @@
          MIPS_CP0FL_CONFIG3 | MIPS_CP0FL_CONFIG6 | MIPS_CP0FL_CONFIG7,
          0, "1004K" },
 
+       { MIPS_PRID_CID_BROADCOM, MIPS_BCM3302, -1, -1, -1, 0,
+         MIPS32_FLAGS | CPU_MIPS_DOUBLE_COUNT, 0, 0, "BCM3302" },
+
        { MIPS_PRID_CID_ALCHEMY, MIPS_AU_REV1, -1, MIPS_AU1000, -1, 0,
          MIPS32_FLAGS | CPU_MIPS_NO_WAIT | CPU_MIPS_I_D_CACHE_COHERENT, 0, 0,
                                                "Au1000 (Rev 1 core)"   },



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