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[src/trunk]: src/sys/arch/evbarm/beagle Add initial support for BEAGLEBONE an...



details:   https://anonhg.NetBSD.org/src/rev/b4dd20456fd3
branches:  trunk
changeset: 781111:b4dd20456fd3
user:      matt <matt%NetBSD.org@localhost>
date:      Mon Aug 20 12:40:40 2012 +0000

description:
Add initial support for BEAGLEBONE and PANDABOARD.

diffstat:

 sys/arch/evbarm/beagle/beagle.h         |  59 ++++++++++++++++++++++++++------
 sys/arch/evbarm/beagle/beagle_machdep.c |  37 ++++++++++++++------
 sys/arch/evbarm/beagle/beagle_start.S   |  27 ++++++++++-----
 3 files changed, 92 insertions(+), 31 deletions(-)

diffs (203 lines):

diff -r 221d3cadd0ec -r b4dd20456fd3 sys/arch/evbarm/beagle/beagle.h
--- a/sys/arch/evbarm/beagle/beagle.h   Mon Aug 20 12:38:28 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle.h   Mon Aug 20 12:40:40 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: beagle.h,v 1.3 2010/06/16 22:06:54 jmcneill Exp $      */
+/*     $NetBSD: beagle.h,v 1.4 2012/08/20 12:40:40 matt Exp $  */
 /*
  * Copyright (c) 2007 Microsoft
  * All rights reserved.
@@ -34,21 +34,58 @@
 #include <arm/omap/omap2_reg.h>
 
 /*
- * Kernel VM space: 576MB at KERNEL_VM_BASE
+ * Memory will mapped 1:1 VA:PA starting at 0x80000000
+ * Kernel VM space: 512MB at KERNEL_VM_BASE
  */
-#define        KERNEL_VM_BASE          ((KERNEL_BASE + 0x01000000) & ~(0x400000-1))
-#define KERNEL_VM_SIZE         0x24000000
+#define KERNEL_VM_BASE         0xc0000000
+#define KERNEL_VM_SIZE         0x20000000
+
+#ifdef OMAP_3530
+#define OMAP_L4_CORE_BASE              OMAP3530_L4_CORE_BASE
+#define OMAP_L4_CORE_SIZE              OMAP3530_L4_CORE_SIZE
+#define OMAP_L4_PERIPHERAL_BASE                OMAP3530_L4_PERIPHERAL_BASE
+#define OMAP_L4_PERIPHERAL_SIZE                OMAP3530_L4_PERIPHERAL_SIZE
+#define OMAP_L4_WAKEUP_BASE            OMAP3530_L4_WAKEUP_BASE
+#define OMAP_L4_WAKEUP_SIZE            OMAP3530_L4_WAKEUP_SIZE
+#endif
+
+#ifdef OMAP_4430
+#define OMAP_L4_CORE_BASE              OMAP4430_L4_CORE_BASE
+#define OMAP_L4_CORE_SIZE              OMAP4430_L4_CORE_SIZE
+#define OMAP_L4_PERIPHERAL_BASE                OMAP4430_L4_PERIPHERAL_BASE
+#define OMAP_L4_PERIPHERAL_SIZE                OMAP4430_L4_PERIPHERAL_SIZE
+#define OMAP_L4_WAKEUP_BASE            OMAP4430_L4_WAKEUP_BASE
+#define OMAP_L4_WAKEUP_SIZE            OMAP4430_L4_WAKEUP_SIZE
+#endif
+
+#ifdef TI_AM335X
+#define OMAP_L4_CORE_BASE              TI_AM335X_L4_WAKEUP_BASE
+#define OMAP_L4_CORE_SIZE              TI_AM335X_L4_WAKEUP_SIZE
+#define OMAP_L4_PERIPHERAL_BASE                TI_AM335X_L4_PERIPHERAL_BASE
+#define OMAP_L4_PERIPHERAL_SIZE                TI_AM335X_L4_PERIPHERAL_SIZE
+#define OMAP_L4_FAST_BASE              TI_AM335X_L4_FAST_BASE
+#define OMAP_L4_FAST_SIZE              TI_AM335X_L4_FAST_SIZE
+#endif
 
 /*
  * We devmap IO starting at KERNEL_VM_BASE + KERNEL_VM_SIZE
  */
-#define        OMAP3530_KERNEL_IO_VBASE        (KERNEL_VM_BASE + KERNEL_VM_SIZE)
-#define        OMAP3530_L4_CORE_VBASE          OMAP3530_KERNEL_IO_VBASE
-#define        OMAP3530_L4_PERIPHERAL_VBASE    (OMAP3530_L4_CORE_VBASE   + OMAP3530_L4_CORE_SIZE)
-#define        OMAP3530_L4_WAKEUP_VBASE        (OMAP3530_L4_PERIPHERAL_VBASE + OMAP3530_L4_PERIPHERAL_SIZE)
-#define        OMAP3530_KERNEL_IO_VEND         (OMAP3530_L4_WAKEUP_VBASE + OMAP3530_L4_WAKEUP_SIZE)
-
-#define CONSADDR_VA    ((CONSADDR - OMAP3530_L4_PERIPHERAL_BASE) + OMAP3530_L4_PERIPHERAL_VBASE)
+#define OMAP_KERNEL_IO_VBASE   (KERNEL_VM_BASE + KERNEL_VM_SIZE)
+#if defined(OMAP_3530) || defined(OMAP_4430)
+#define OMAP_L4_CORE_VBASE     OMAP_KERNEL_IO_VBASE
+#define OMAP_L4_PERIPHERAL_VBASE       (OMAP_L4_CORE_VBASE + OMAP_L4_CORE_SIZE)
+#define OMAP_L4_WAKEUP_VBASE   (OMAP_L4_PERIPHERAL_VBASE + OMAP_L4_PERIPHERAL_SIZE)
+#define OMAP_KERNEL_IO_VEND    (OMAP_L4_WAKEUP_VBASE + OMAP_L4_WAKEUP_SIZE)
+#define CONSADDR_VA    ((CONSADDR - OMAP_L4_PERIPHERAL_BASE) + OMAP_L4_PERIPHERAL_VBASE)
+#elif defined(TI_AM335X)
+#define OMAP_L4_CORE_VBASE     OMAP_KERNEL_IO_VBASE
+#define OMAP_L4_PERIPHERAL_VBASE       (OMAP_L4_CORE_VBASE + OMAP_L4_CORE_SIZE)
+#define OMAP_L4_FAST_VBASE     (OMAP_L4_PERIPHERAL_VBASE + OMAP_L4_PERIPHERAL_SIZE)
+#define OMAP_KERNEL_IO_VEND    (OMAP_L4_FAST_VBASE + OMAP_L4_FAST_SIZE)
+#define CONSADDR_VA    ((CONSADDR - OMAP_L4_CORE_BASE) + OMAP_L4_CORE_VBASE)
+#else
+#error unknown OMAP variant
+#endif
 
 
 #endif /* _EVBARM_BEAGLE_BEAGLE_H */
diff -r 221d3cadd0ec -r b4dd20456fd3 sys/arch/evbarm/beagle/beagle_machdep.c
--- a/sys/arch/evbarm/beagle/beagle_machdep.c   Mon Aug 20 12:38:28 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_machdep.c   Mon Aug 20 12:40:40 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: beagle_machdep.c,v 1.15 2012/08/16 18:26:22 matt Exp $ */
+/*     $NetBSD: beagle_machdep.c,v 1.16 2012/08/20 12:40:40 matt Exp $ */
 
 /*
  * Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.15 2012/08/16 18:26:22 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.16 2012/08/20 12:40:40 matt Exp $");
 
 #include "opt_machdep.h"
 #include "opt_ddb.h"
@@ -348,9 +348,9 @@
                 * this gets us the ICU, I2C, USB, GPT[10-11], MMC, McSPI
                 * UART[12], clock manager, sDMA, ...
                 */
-               .pd_va = _A(OMAP3530_L4_CORE_VBASE),
-               .pd_pa = _A(OMAP3530_L4_CORE_BASE),
-               .pd_size = _S(1 << 20),
+               .pd_va = _A(OMAP_L4_CORE_VBASE),
+               .pd_pa = _A(OMAP_L4_CORE_BASE),
+               .pd_size = _S(OMAP_L4_CORE_SIZE),
                .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
                .pd_cache = PTE_NOCACHE
        },
@@ -360,23 +360,38 @@
                 * this gets us the console UART3, GPT[2-9], WDT1, 
                 * and GPIO[2-6].
                 */
-               .pd_va = _A(OMAP3530_L4_PERIPHERAL_VBASE),
-               .pd_pa = _A(OMAP3530_L4_PERIPHERAL_BASE),
-               .pd_size = _S(1 << 20),
+               .pd_va = _A(OMAP_L4_PERIPHERAL_VBASE),
+               .pd_pa = _A(OMAP_L4_PERIPHERAL_BASE),
+               .pd_size = _S(OMAP_L4_PERIPHERAL_SIZE),
                .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
                .pd_cache = PTE_NOCACHE
        },
+#if defined(OMAP_L4_WAKEUP_BASE) && (OMAP_L4_WAKEUP_BASE != OMAP_L4_CORE_BASE)
        {
                /*
                 * Map all 256KB of the L4 Wakeup area
                 * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs
                 */
-               .pd_va = _A(OMAP3530_L4_WAKEUP_VBASE),
-               .pd_pa = _A(OMAP3530_L4_WAKEUP_BASE),
-               .pd_size = _S(1 << 18),
+               .pd_va = _A(OMAP_L4_WAKEUP_VBASE),
+               .pd_pa = _A(OMAP_L4_WAKEUP_BASE),
+               .pd_size = _S(OMAP_L4_WAKEUP_SIZE),
                .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
                .pd_cache = PTE_NOCACHE
        },
+#endif
+#ifdef OMAP_L4_FAST_BASE
+       {
+               /*
+                * Map all of the L4 Fast area
+                * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs
+                */
+               .pd_va = _A(OMAP_L4_FAST_VBASE),
+               .pd_pa = _A(OMAP_L4_FAST_BASE),
+               .pd_size = _S(OMAP_L4_FAST_SIZE),
+               .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+               .pd_cache = PTE_NOCACHE
+       },
+#endif
        {0}
 };
 
diff -r 221d3cadd0ec -r b4dd20456fd3 sys/arch/evbarm/beagle/beagle_start.S
--- a/sys/arch/evbarm/beagle/beagle_start.S     Mon Aug 20 12:38:28 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_start.S     Mon Aug 20 12:40:40 2012 +0000
@@ -92,7 +92,7 @@
 #include <arm/omap/omap2_obioreg.h>
 #include <evbarm/beagle/beagle.h>  
 
-RCSID("$NetBSD: beagle_start.S,v 1.6 2011/06/30 20:09:23 wiz Exp $")
+RCSID("$NetBSD: beagle_start.S,v 1.7 2012/08/20 12:40:40 matt Exp $")
 
 #define Invalidate_I_cache(reg) \
        mcr     p15, 0, reg, c7, c5, 0  /* Invalidate Entire I cache */
@@ -273,19 +273,28 @@
                L1_S_PROTO | L1_S_APv7_KRW | L1_S_B | L1_S_C)
 
        /* Map first 1MB of L4 CORE (so console will work) */
-       MMU_INIT(OMAP3530_L4_CORE_VBASE, OMAP3530_L4_CORE_BASE,
-               1,
+       MMU_INIT(OMAP_L4_CORE_VBASE, OMAP_L4_CORE_BASE,
+               (OMAP_L4_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+               L1_S_PROTO | L1_S_APv7_KRW)
+
+       /* Map first 4MB of L4 PERIPHERAL (so console will work) */
+       MMU_INIT(OMAP_L4_PERIPHERAL_VBASE, OMAP_L4_PERIPHERAL_BASE,
+               (OMAP_L4_PERIPHERAL_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
                L1_S_PROTO | L1_S_APv7_KRW)
 
-       /* Map first(all) 1MB of L4 PERIPHERAL (so console will work) */
-       MMU_INIT(OMAP3530_L4_PERIPHERAL_VBASE, OMAP3530_L4_PERIPHERAL_BASE,
-               1,
+#ifdef OMAP_L4_WAKEUP_BASE
+       /* Map all 4MB of L4 WAKEUP (so console will work) */
+       MMU_INIT(OMAP_L4_WAKEUP_VBASE, OMAP_L4_WAKEUP_BASE,
+               (OMAP_L4_WAKEUP_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
                L1_S_PROTO | L1_S_APv7_KRW)
+#endif
 
-       /* Map all 256KB of L4 WAKEUP (so console will work) */
-       MMU_INIT(OMAP3530_L4_WAKEUP_VBASE, OMAP3530_L4_WAKEUP_BASE,
-               1,
+#ifdef OMAP_L4_FAST_BASE
+       /* Map first 1MB of L4 FAST (so console will work) */
+       MMU_INIT(OMAP_L4_FAST_VBASE, OMAP_L4_FAST_BASE,
+               (OMAP_L4_FAST_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
                L1_S_PROTO | L1_S_APv7_KRW)
+#endif
 
        /* end of table */
        MMU_INIT(0, 0, 0, 0)



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