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[src/trunk]: src/sys/arch/sparc64/dev Correct the VSYNC-related register defi...



details:   https://anonhg.NetBSD.org/src/rev/64b97baa3058
branches:  trunk
changeset: 770562:64b97baa3058
user:      jdc <jdc%NetBSD.org@localhost>
date:      Sun Oct 23 06:06:24 2011 +0000

description:
Correct the VSYNC-related register definitions and rework how they are used
(only when the monitor supports composite sync).  OK macallan@.

diffstat:

 sys/arch/sparc64/dev/ffb.c    |  37 +++++++++++++------------------------
 sys/arch/sparc64/dev/ffbreg.h |   6 +++---
 2 files changed, 16 insertions(+), 27 deletions(-)

diffs (82 lines):

diff -r abca8cc51296 -r 64b97baa3058 sys/arch/sparc64/dev/ffb.c
--- a/sys/arch/sparc64/dev/ffb.c        Sun Oct 23 05:03:37 2011 +0000
+++ b/sys/arch/sparc64/dev/ffb.c        Sun Oct 23 06:06:24 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ffb.c,v 1.46 2011/08/18 12:53:25 macallan Exp $        */
+/*     $NetBSD: ffb.c,v 1.47 2011/10/23 06:06:24 jdc Exp $     */
 /*     $OpenBSD: creator.c,v 1.20 2002/07/30 19:48:15 jason Exp $      */
 
 /*
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ffb.c,v 1.46 2011/08/18 12:53:25 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ffb.c,v 1.47 2011/10/23 06:06:24 jdc Exp $");
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -1355,32 +1355,21 @@
        }
 
        /* DAC Control and Timing Generator Control */
-       if (mode->flags & VID_PVSYNC) {
-               dcl = FFB_DAC_DAC_CTRL_POS_SYNC;
-               if (mode->flags & VID_NHSYNC) {
-#if 0
-/* XXX */
-                       dcl |= FFB_DAC_DAC_CTRL_VSYNC_REV;
-#endif
-                       tgc = 0;
-               } else {
-                       tgc = FFB_DAC_TGC_EQUAL_DISABLE;
-               }
+       if (mode->flags & VID_PVSYNC)
+               dcl = FFB_DAC_DAC_CTRL_POS_VSYNC;
+       else
+               dcl = 0;
+       tgc = 0;
+#define EDID_VID_INP   sc->sc_edid_info.edid_video_input
+       if ((EDID_VID_INP & EDID_VIDEO_INPUT_COMPOSITE_SYNC)) {
+               dcl |= FFB_DAC_DAC_CTRL_VSYNC_DIS;
+               tgc = FFB_DAC_TGC_EQUAL_DISABLE;
        } else {
-               dcl = 0;
-               if (mode->flags & VID_PVSYNC) {
-                       dcl |= FFB_DAC_DAC_CTRL_VSYNC_REV;
-                       tgc = 0;
-               } else {
-                       tgc = FFB_DAC_TGC_EQUAL_DISABLE;
-               }
-       }
-#define EDID_VID_INP   sc->sc_edid_info.edid_video_input
-
-       if (!(EDID_VID_INP & EDID_VIDEO_INPUT_COMPOSITE_SYNC)) {
                dcl |= FFB_DAC_DAC_CTRL_SYNC_G;
                if (EDID_VID_INP & EDID_VIDEO_INPUT_SEPARATE_SYNCS)
                        tgc |= FFB_DAC_TGC_VSYNC_DISABLE;
+               else
+                       tgc = FFB_DAC_TGC_EQUAL_DISABLE;
        }
        if (EDID_VID_INP & EDID_VIDEO_INPUT_BLANK_TO_BLACK)
                dcl |= FFB_DAC_DAC_CTRL_PED_ENABLE;
diff -r abca8cc51296 -r 64b97baa3058 sys/arch/sparc64/dev/ffbreg.h
--- a/sys/arch/sparc64/dev/ffbreg.h     Sun Oct 23 05:03:37 2011 +0000
+++ b/sys/arch/sparc64/dev/ffbreg.h     Sun Oct 23 06:06:24 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ffbreg.h,v 1.8 2011/05/09 08:44:22 jdc Exp $   */
+/*     $NetBSD: ffbreg.h,v 1.9 2011/10/23 06:06:24 jdc Exp $   */
 /*     $OpenBSD: creatorreg.h,v 1.5 2002/07/29 06:21:45 jason Exp $    */
 
 /*
@@ -103,8 +103,8 @@
 /* 0x5001 DAC control */
 #define        FFB_DAC_DAC_CTRL_SYNC_G         0x0020  /* enable sync on green */
 #define FFB_DAC_DAC_CTRL_PED_ENABLE    0x0040  /* enable pedestal */
-#define FFB_DAC_DAC_CTRL_VSYNC_REV     0x0080  /* reverse vsync (BT497A) */
-#define FFB_DAC_DAC_CTRL_POS_SYNC      0x0100  /* enable pos. sync (BT497A) */
+#define FFB_DAC_DAC_CTRL_VSYNC_DIS     0x0080  /* disable vsync pin */
+#define FFB_DAC_DAC_CTRL_POS_VSYNC     0x0100  /* enable pos. vsync */
 
 /* 0x6000 timing generator control */
 #define        FFB_DAC_TGC_VIDEO_ENABLE        0x01    /* enable DAC outputs */



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