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[src/trunk]: src/sys/arch/arm/include Move fill to between spsr and r0 so tha...
details: https://anonhg.NetBSD.org/src/rev/79eebe249559
branches: trunk
changeset: 780651:79eebe249559
user: matt <matt%NetBSD.org@localhost>
date: Wed Aug 01 22:46:07 2012 +0000
description:
Move fill to between spsr and r0 so that the registers will be dword aligned.
Adjust PUSH/PULL macros accordingly.
diffstat:
sys/arch/arm/include/arm32/frame.h | 20 ++++++++++----------
sys/arch/arm/include/frame.h | 4 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diffs (109 lines):
diff -r 9051c98a0c30 -r 79eebe249559 sys/arch/arm/include/arm32/frame.h
--- a/sys/arch/arm/include/arm32/frame.h Wed Aug 01 22:28:10 2012 +0000
+++ b/sys/arch/arm/include/arm32/frame.h Wed Aug 01 22:46:07 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.28 2012/08/01 05:40:20 matt Exp $ */
+/* $NetBSD: frame.h,v 1.29 2012/08/01 22:46:07 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -56,6 +56,7 @@
typedef struct irqframe {
unsigned int if_spsr;
+ unsigned int if_fill; /* fill here so r0 will dword aligned */
unsigned int if_r0;
unsigned int if_r1;
unsigned int if_r2;
@@ -71,7 +72,6 @@
unsigned int if_r12;
unsigned int if_usr_sp;
unsigned int if_usr_lr;
- unsigned int if_fill;
unsigned int if_svc_sp;
unsigned int if_svc_lr;
unsigned int if_pc;
@@ -324,11 +324,11 @@
#define PUSHFRAME \
str lr, [sp, #-4]!; /* Push the return address */ \
- sub sp, sp, #(4*18); /* Adjust the stack pointer */ \
+ sub sp, sp, #(4*17); /* Adjust the stack pointer */ \
PUSHUSERREGS; /* Push the user mode registers */ \
mov r0, r0; /* NOP for previous instruction */ \
mrs r0, spsr_all; /* Get the SPSR */ \
- str r0, [sp, #-4]! /* Push the SPSR on the stack */
+ str r0, [sp, #-8]! /* Push the SPSR on the stack */
/*
* PULLFRAME - macro to pull a trap frame from the stack in the current mode
@@ -336,11 +336,11 @@
*/
#define PULLFRAME \
- ldr r0, [sp], #0x0004; /* Pop the SPSR from stack */ \
+ ldr r0, [sp], #0x0008; /* Pop the SPSR from stack */ \
msr spsr_all, r0; \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*18); /* Adjust the stack pointer */ \
+ add sp, sp, #(4*17); /* Adjust the stack pointer */ \
ldr lr, [sp], #0x0004 /* Pop the return address */
/*
@@ -374,14 +374,14 @@
bic r2, sp, #7; /* Align new SVC sp */ \
str r0, [r2, #-4]!; /* Push return address */ \
stmdb r2!, {sp, lr}; /* Push SVC sp, lr */ \
- sub sp, r2, #4; /* Keep stack aligned */ \
+ mov sp, r2; /* Keep stack aligned */ \
msr spsr_all, r3; /* Restore correct spsr */ \
ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
sub sp, sp, #(4*15); /* Adjust the stack pointer */ \
PUSHUSERREGS; /* Push the user mode registers */ \
mov r0, r0; /* NOP for previous instruction */ \
mrs r0, spsr_all; /* Get the SPSR */ \
- str r0, [sp, #-4]! /* Push the SPSR onto the stack */
+ str r0, [sp, #-8]! /* Push the SPSR onto the stack */
/*
* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
@@ -391,11 +391,11 @@
*/
#define PULLFRAMEFROMSVCANDEXIT \
- ldr r0, [sp], #0x0004; /* Pop the SPSR from stack */ \
+ ldr r0, [sp], #0x0008; /* Pop the SPSR from stack */ \
msr spsr_all, r0; /* restore SPSR */ \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*16); /* Adjust the stack pointer */ \
+ add sp, sp, #(4*15); /* Adjust the stack pointer */ \
ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
#endif /* _LOCORE */
diff -r 9051c98a0c30 -r 79eebe249559 sys/arch/arm/include/frame.h
--- a/sys/arch/arm/include/frame.h Wed Aug 01 22:28:10 2012 +0000
+++ b/sys/arch/arm/include/frame.h Wed Aug 01 22:46:07 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.14 2012/07/31 07:23:16 matt Exp $ */
+/* $NetBSD: frame.h,v 1.15 2012/08/01 22:46:07 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -52,6 +52,7 @@
typedef struct trapframe {
register_t tf_spsr; /* Zero on arm26 */
+ register_t tf_fill; /* fill here so r0 will dword aligned */
register_t tf_r0;
register_t tf_r1;
register_t tf_r2;
@@ -67,7 +68,6 @@
register_t tf_r12;
register_t tf_usr_sp;
register_t tf_usr_lr;
- register_t tf_fill;
register_t tf_svc_sp; /* Not used on arm26 */
register_t tf_svc_lr; /* Not used on arm26 */
register_t tf_pc;
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