Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/mips Add support for a loongson2_subr.S. This is n...
details: https://anonhg.NetBSD.org/src/rev/a69712675e36
branches: trunk
changeset: 767811:a69712675e36
user: matt <matt%NetBSD.org@localhost>
date: Sun Jul 31 15:39:28 2011 +0000
description:
Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
diffstat:
sys/arch/mips/conf/files.mips | 5 +-
sys/arch/mips/mips/locore_mips3.S | 3 +-
sys/arch/mips/mips/loongson2_subr.S | 15 +++++++
sys/arch/mips/mips/mips32_subr.S | 3 +-
sys/arch/mips/mips/mips32r2_subr.S | 3 +-
sys/arch/mips/mips/mips3_subr.S | 3 +-
sys/arch/mips/mips/mips64_subr.S | 3 +-
sys/arch/mips/mips/mips64r2_subr.S | 3 +-
sys/arch/mips/mips/mipsX_subr.S | 61 +++++++++++++++++++++++++---
sys/arch/mips/mips/mips_machdep.c | 77 +++++++++++++++++++++++++++++++++---
10 files changed, 154 insertions(+), 22 deletions(-)
diffs (truncated from 405 to 300 lines):
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/conf/files.mips
--- a/sys/arch/mips/conf/files.mips Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/conf/files.mips Sun Jul 31 15:39:28 2011 +0000
@@ -1,13 +1,13 @@
-# $NetBSD: files.mips,v 1.70 2011/06/12 03:35:43 rmind Exp $
+# $NetBSD: files.mips,v 1.71 2011/07/31 15:39:28 matt Exp $
#
defflag opt_cputype.h NOFPU FPEMUL
MIPS64_SB1
- MIPS3_LOONGSON2F
ENABLE_MIPS_16KB_PAGE
MIPS64_XLP MIPS64_XLR MIPS64_XLS
# and the rest...
# MIPS1 MIPS2 MIPS3 MIPS4 MIPS5
+ # MIPS3_LOONGSON2
# MIPS32 MIPS32R2 MIPS64 MIPS64R2
# MIPS3_4100
# ENABLE_MIPS_4KB_PAGE
@@ -27,6 +27,7 @@
file arch/mips/mips/mips32r2_subr.S mips32r2
file arch/mips/mips/mips64_subr.S mips64
file arch/mips/mips/mips64r2_subr.S mips64r2
+file arch/mips/mips/loongson2_subr.S mips3_loongson2
file arch/mips/mips/sigcode.S
file arch/mips/mips/copy.S
file arch/mips/mips/lock_stubs_llsc.S multiprocessor
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/locore_mips3.S
--- a/sys/arch/mips/mips/locore_mips3.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/locore_mips3.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_mips3.S,v 1.100 2011/07/10 23:21:59 matt Exp $ */
+/* $NetBSD: locore_mips3.S,v 1.101 2011/07/31 15:39:29 matt Exp $ */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -151,6 +151,7 @@
*----------------------------------------------------------------------------
*/
LEAF(mips3_wbflush)
+XLEAF(loongson2_wbflush)
XLEAF(mips32_wbflush)
XLEAF(mips32r2_wbflush)
XLEAF(mips64_wbflush)
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/loongson2_subr.S
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mips/mips/loongson2_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -0,0 +1,15 @@
+/* $NetBSD: loongson2_subr.S,v 1.1 2011/07/31 15:39:29 matt Exp $ */
+
+#undef MIPS1
+/* #undef MIPS3 */
+/* #undef MIPS3_LOONGSON2 */
+#undef MIPS32
+#undef MIPS32R2
+#undef MIPS64
+#undef MIPS64R2
+#undef MIPS64_SB1
+#undef MIPS64_XLP
+#undef MIPS64_XLR
+#undef MIPS64_XLS
+
+#include <mips/mips/mipsX_subr.S>
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips32_subr.S
--- a/sys/arch/mips/mips/mips32_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips32_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,7 +1,8 @@
-/* $NetBSD: mips32_subr.S,v 1.5 2011/03/15 07:39:22 matt Exp $ */
+/* $NetBSD: mips32_subr.S,v 1.6 2011/07/31 15:39:29 matt Exp $ */
#undef MIPS1
#undef MIPS3
+#undef MIPS3_LOONGSON2
/* #undef MIPS32 */
#undef MIPS32R2
#undef MIPS64
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips32r2_subr.S
--- a/sys/arch/mips/mips/mips32r2_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips32r2_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,7 +1,8 @@
-/* $NetBSD: mips32r2_subr.S,v 1.1 2011/03/15 07:39:22 matt Exp $ */
+/* $NetBSD: mips32r2_subr.S,v 1.2 2011/07/31 15:39:29 matt Exp $ */
#undef MIPS1
#undef MIPS3
+#undef MIPS3_LOONGSON2
#undef MIPS32
/* #undef MIPS32R2 */
#undef MIPS64
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips3_subr.S
--- a/sys/arch/mips/mips/mips3_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips3_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,7 +1,8 @@
-/* $NetBSD: mips3_subr.S,v 1.5 2011/03/15 07:39:22 matt Exp $ */
+/* $NetBSD: mips3_subr.S,v 1.6 2011/07/31 15:39:29 matt Exp $ */
#undef MIPS1
/* #undef MIPS3 */
+#undef MIPS3_LOONGSON2
#undef MIPS32
#undef MIPS32R2
#undef MIPS64
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips64_subr.S
--- a/sys/arch/mips/mips/mips64_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips64_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,7 +1,8 @@
-/* $NetBSD: mips64_subr.S,v 1.5 2011/03/15 07:39:22 matt Exp $ */
+/* $NetBSD: mips64_subr.S,v 1.6 2011/07/31 15:39:29 matt Exp $ */
#undef MIPS1
#undef MIPS3
+#undef MIPS3_LOONGSON2
#undef MIPS32
#undef MIPS32R2
/* #undef MIPS64 */
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips64r2_subr.S
--- a/sys/arch/mips/mips/mips64r2_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips64r2_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,7 +1,8 @@
-/* $NetBSD: mips64r2_subr.S,v 1.1 2011/03/15 07:39:22 matt Exp $ */
+/* $NetBSD: mips64r2_subr.S,v 1.2 2011/07/31 15:39:29 matt Exp $ */
#undef MIPS1
#undef MIPS3
+#undef MIPS3_LOONGSON2
#undef MIPS32
#undef MIPS32R2
#undef MIPS64
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mipsX_subr.S
--- a/sys/arch/mips/mips/mipsX_subr.S Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mipsX_subr.S Sun Jul 31 15:39:28 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.50 2011/07/10 23:21:59 matt Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.51 2011/07/31 15:39:29 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -228,7 +228,9 @@
* CPP function renaming macros.
*/
-#if defined(MIPS3)
+#if defined(MIPS3_LOONGSON2)
+#define MIPSX(name) __CONCAT(loongson2_,name)
+#elif defined(MIPS3)
#define MIPSX(name) __CONCAT(mips3_,name)
#endif
@@ -1639,7 +1641,10 @@
#endif
tlbwi # write TLB
COP0_SYNC
-#ifdef MIPS3
+#ifdef MIPS3_LOONGSON2
+ li k0, 4 # ugly
+ mtc0 k0, MIPS_COP_0_DIAG # invalidate ITLB
+#elif defined(MIPS3)
nop
nop
#endif
@@ -1671,7 +1676,10 @@
#endif
tlbwi # update TLB
COP0_SYNC
-#ifdef MIPS3
+#ifdef MIPS3_LOONGSON2
+ li k0, 4 # ugly
+ mtc0 k0, MIPS_COP_0_DIAG # invalidate ITLB
+#elif defined(MIPS3)
nop
nop
#endif
@@ -1753,7 +1761,10 @@
COP0_SYNC
tlbwi # update slot found
COP0_SYNC
-#ifdef MIPS3
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#elif defined(MIPS3)
nop # required for QED5230
nop # required for QED5230
#endif
@@ -1772,7 +1783,10 @@
COP0_SYNC
tlbwi # update slot found
COP0_SYNC
-#ifdef MIPS3
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#elif defined(MIPS3)
nop # required for QED5230
nop # required for QED5230
#endif
@@ -1890,7 +1904,10 @@
tlbwi
COP0_SYNC
-#ifdef MIPS3
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#elif defined(MIPS3)
nop
nop
#endif
@@ -1956,6 +1973,12 @@
_MFC0 t0, MIPS_COP_0_TLB_HI # restore PID.
mtc0 t3, MIPS_COP_0_TLB_PG_MASK # restore pgMask
COP0_SYNC
+
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#endif
+
mtc0 v1, MIPS_COP_0_STATUS # restore status register
JR_HB_RA # new ASID will be set soon
END(MIPSX(tlb_invalidate_asids))
@@ -2005,6 +2028,12 @@
_MTC0 t0, MIPS_COP_0_TLB_HI # restore current ASID
mtc0 t3, MIPS_COP_0_TLB_PG_MASK # restore pgMask
COP0_SYNC
+
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#endif
+
mtc0 v1, MIPS_COP_0_STATUS # restore status register
JR_HB_RA
END(MIPSX(tlb_invalidate_globals))
@@ -2047,6 +2076,12 @@
_MTC0 t0, MIPS_COP_0_TLB_HI # restore ASID
mtc0 t2, MIPS_COP_0_TLB_PG_MASK # restore pgMask
COP0_SYNC
+
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#endif
+
mtc0 v1, MIPS_COP_0_STATUS # restore status register
JR_HB_RA
END(MIPSX(tlb_invalidate_all))
@@ -2204,6 +2239,12 @@
COP0_SYNC
_MTC0 ta1, MIPS_COP_0_TLB_HI # restore EntryHi
+
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#endif
+
JR_HB_RA
.set at
END(MIPSX(tlb_enter))
@@ -2432,6 +2473,12 @@
_MTC0 t0, MIPS_COP_0_TLB_HI # Restore the PID.
mtc0 v0, MIPS_COP_0_TLB_PG_MASK # Restore page mask.
COP0_SYNC
+
+#ifdef MIPS3_LOONGSON2
+ li v0, 4 # ugly
+ mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+#endif
+
mtc0 v1, MIPS_COP_0_STATUS # Restore the status register
JR_HB_RA
END(MIPSX(tlb_write_indexed))
diff -r 19bc438484aa -r a69712675e36 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Sun Jul 31 15:36:28 2011 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Sun Jul 31 15:39:28 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.244 2011/06/14 05:30:40 matt Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.245 2011/07/31 15:39:29 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.244 2011/06/14 05:30:40 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.245 2011/07/31 15:39:29 matt Exp $");
#define __INTR_PRIVATE
#include "opt_cputype.h"
@@ -220,6 +220,12 @@
extern const mips_locore_jumpvec_t mips3_locore_vec;
#endif
+#if defined(MIPS3_LOONGSON2)
+static void loongson2_vector_init(const struct splsw *);
+extern const struct locoresw loongson2_locoresw;
+extern const mips_locore_jumpvec_t loongson2_locore_vec;
+#endif
Home |
Main Index |
Thread Index |
Old Index