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[src/trunk]: src/sys Employ the two free 16 bit timers of the Hurdler Centron...
details: https://anonhg.NetBSD.org/src/rev/4711fc69309a
branches: trunk
changeset: 773360:4711fc69309a
user: hauke <hauke%NetBSD.org@localhost>
date: Tue Jan 31 22:13:19 2012 +0000
description:
Employ the two free 16 bit timers of the Hurdler Centronics Parallel
Interface card's Z8536 CIO for Timecounter support.
Builds, should work, but not testable yet because of pmap breakage.
diffstat:
sys/arch/mac68k/conf/GENERIC | 7 +-
sys/arch/mac68k/nubus/cpi_nubus.c | 344 ++++++++++++++++++++++++----------
sys/arch/mac68k/nubus/cpi_nubusvar.h | 21 +-
sys/dev/ic/z8536reg.h | 5 +-
4 files changed, 263 insertions(+), 114 deletions(-)
diffs (truncated from 603 to 300 lines):
diff -r fbc555dabf0c -r 4711fc69309a sys/arch/mac68k/conf/GENERIC
--- a/sys/arch/mac68k/conf/GENERIC Tue Jan 31 21:53:42 2012 +0000
+++ b/sys/arch/mac68k/conf/GENERIC Tue Jan 31 22:13:19 2012 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.204 2011/12/18 05:49:29 dholland Exp $
+# $NetBSD: GENERIC,v 1.205 2012/01/31 22:13:20 hauke Exp $
#
# GENERIC machine description file
#
@@ -22,7 +22,7 @@
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "GENERIC-$Revision: 1.204 $"
+#ident "GENERIC-$Revision: 1.205 $"
maxusers 16 # estimated number of users
@@ -234,7 +234,8 @@
# Centronics printer port
# CSI Hurdler Centronics Parallel Interface
-cpi* at nubus?
+# CPI_CTC12_IS_TIMECOUNTER 0x01 Run counters 1+2 as timecounter
+cpi* at nubus? flags 0x1
# Serial Devices
diff -r fbc555dabf0c -r 4711fc69309a sys/arch/mac68k/nubus/cpi_nubus.c
--- a/sys/arch/mac68k/nubus/cpi_nubus.c Tue Jan 31 21:53:42 2012 +0000
+++ b/sys/arch/mac68k/nubus/cpi_nubus.c Tue Jan 31 22:13:19 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpi_nubus.c,v 1.5 2011/05/13 22:35:50 rmind Exp $ */
+/* $NetBSD: cpi_nubus.c,v 1.6 2012/01/31 22:13:20 hauke Exp $ */
/*-
* Copyright (c) 2008 Hauke Fath
@@ -25,8 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpi_nubus.c,v 1.5 2011/05/13 22:35:50 rmind Exp $");
-
+__KERNEL_RCSID(0, "$NetBSD: cpi_nubus.c,v 1.6 2012/01/31 22:13:20 hauke Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/proc.h>
@@ -40,6 +39,7 @@
#include <sys/ioctl.h>
#include <sys/tty.h>
#include <sys/time.h>
+#include <sys/timetc.h>
#include <sys/kernel.h>
#include <sys/syslog.h>
#include <sys/errno.h>
@@ -71,6 +71,7 @@
#define M_TRACE_WRITE 0x0010
#define M_TRACE_IOCTL 0x0020
#define M_TRACE_STATUS 0x0040
+#define M_TRACE_TCNTR 0x0080
#define M_TRACE_ALL 0xFFFF
#define M_TRACE_NONE 0x0000
@@ -81,12 +82,12 @@
#define TRACE_WRITE (cpi_debug_mask & M_TRACE_WRITE)
#define TRACE_IOCTL (cpi_debug_mask & M_TRACE_IOCTL)
#define TRACE_STATUS (cpi_debug_mask & M_TRACE_STATUS)
+#define TRACE_TCNTR (cpi_debug_mask & M_TRACE_TCNTR)
#define TRACE_ALL (cpi_debug_mask & M_TRACE_ALL)
#define TRACE_NONE (cpi_debug_mask & M_TRACE_NONE)
-uint32_t cpi_debug_mask = M_TRACE_NONE /* | M_TRACE_WRITE */ ;
-
-#else
+uint32_t cpi_debug_mask = M_TRACE_NONE /* | M_TRACE_TCNTR | M_TRACE_WRITE */ ;
+#else /* CPI_DEBUG */
#define TRACE_CONFIG 0
#define TRACE_OPEN 0
#define TRACE_CLOSE 0
@@ -94,11 +95,10 @@
#define TRACE_WRITE 0
#define TRACE_IOCTL 0
#define TRACE_STATUS 0
+#define TRACE_TCNTR 0
#define TRACE_ALL 0
#define TRACE_NONE 0
-#endif
-
-#undef USE_CIO_TIMERS /* TBD */
+#endif /* CPI_DEBUG */
/* autoconf interface */
int cpi_nubus_match(device_t, cfdata_t, void *);
@@ -126,14 +126,13 @@
static int cpi_flush(struct cpi_softc *);
static void cpi_intr(void *);
-#ifdef USE_CIO_TIMERS
-static void cpi_initclock(struct cpi_softc *);
-static u_int cpi_get_timecount(struct timecounter *);
-#endif
-
-static inline void z8536_reg_set(bus_space_tag_t, bus_space_handle_t,
+static void cpi_tc_initclock(struct cpi_softc *);
+static uint cpi_get_timecount(struct timecounter *);
+static uint z8536_read_counter1(bus_space_tag_t, bus_space_handle_t);
+static uint z8536_read_counter2(bus_space_tag_t, bus_space_handle_t);
+static void z8536_reg_set(bus_space_tag_t, bus_space_handle_t,
uint8_t, uint8_t);
-static inline uint8_t z8536_reg_get(bus_space_tag_t, bus_space_handle_t,
+static uint8_t z8536_reg_get(bus_space_tag_t, bus_space_handle_t,
uint8_t);
@@ -191,19 +190,6 @@
Z8536_DPPRC, 0x00,
Z8536_SIOCRC, 0x00,
-#ifdef USE_CIO_TIMERS
- /*
- * Counter/Timers 1+2 are joined to form a free-running
- * 32 bit timecounter
- */
- Z8536_CTMSR1, CTMS_CSC,
- Z8536_CTTCR1_MSB, 0x00,
- Z8536_CTTCR1_LSB, 0x00,
- Z8536_CTMSR2, CTMS_CSC,
- Z8536_CTTCR2_MSB, 0x00,
- Z8536_CTTCR2_LSB, 0x00,
-#endif /* USE_CIO_TIMERS */
-
/*
* We need Timer 3 for running port A in strobed mode.
*
@@ -215,18 +201,19 @@
Z8536_CTTCR3_MSB, 0x00,
Z8536_CTTCR3_LSB, 0x03,
- /*
- * Enable ports A+B+C+CT3
- * Set timer 1 to clock timer 2, but not yet enabled.
- */
- Z8536_MCCR, MCCR_PAE | MCCR_PBE | MCCR_CT1CT2 | MCCR_PC_CT3E,
+ /* Enable ports A+B+C+CT3 */
+ Z8536_MCCR, MCCR_PAE | MCCR_PBE | MCCR_PC_CT3E,
+
/* Master Interrupt Enable, Disable Lower Chain,
- * No Vector, port A+B+CT vectors include status */
+ * No Interrupt Vector, port A+B+CT vectors include status */
Z8536_MICR, MICR_MIE | MICR_DLC | MICR_NV | MICR_PAVIS |
MICR_PBVIS | MICR_CTVIS,
Z8536_PDRB, 0xFE, /* Clear printer -RESET */
};
+/* CPI default options */
+/* int cpi_options = 0 | CPI_CTC12_IS_TIMECOUNTER; */
+
/*
* Look for Creative Systems Inc. "Hurdler Centronics Parallel Interface"
@@ -254,13 +241,15 @@
int err, ii;
sc = device_private(self);
+ sc->sc_options = (device_cfdata(self)->cf_flags & CPI_OPTIONS_MASK);
+
na = aux;
sc->sc_bst = na->na_tag;
memcpy(&sc->sc_slot, na->fmt, sizeof(nubus_slot));
sc->sc_basepa = (bus_addr_t)NUBUS_SLOT2PA(na->slot);
/*
- * The CIO sits on the MSB (top byte lane) of the 32 bit
+ * The CIO sits eight bit wide on the top byte lane of
* Nubus, so map 16 byte.
*/
if (TRACE_CONFIG) {
@@ -287,7 +276,7 @@
z8536_reg_set(sc->sc_bst, sc->sc_bsh, cio_reset[ii],
cio_reset[ii + 1]);
- delay(1000); /* Just in case */
+ delay(1000); /* Give the CIO time to set itself up */
for (ii = 0; ii < sizeof(cio_init); ii += 2) {
z8536_reg_set(sc->sc_bst, sc->sc_bsh, cio_init[ii],
cio_init[ii + 1]);
@@ -296,16 +285,13 @@
if (TRACE_CONFIG)
printf("\tcpi_nubus_attach() done with 8536 CIO setup.\n");
- /* XXX Get the information strings from the card's ROM */
+ /* XXX Get information strings from the card ROM */
aprint_normal(": CSI Hurdler II Centronics\n");
-#ifdef USE_CIO_TIMERS
- /* Attach CIO timers as timecounters */
- if (TRACE_CONFIG)
- printf("\tcpi_nubus_attach() about to attach timers\n");
-
- cpi_initclock(sc);
-#endif /* USE_CIO_TIMERS */
+ /* Attach CIO timers 1+2 as timecounter */
+ if (sc->sc_options & CPI_CTC12_IS_TIMECOUNTER) {
+ cpi_tc_initclock(sc);
+ }
callout_init(&sc->sc_wakeupchan, 0); /* XXX */
@@ -557,27 +543,12 @@
cpi_lpreset(struct cpi_softc *sc)
{
uint8_t portb; /* Centronics -RESET is on port B, bit 0 */
-#ifdef DIRECT_PORT_ACCESS
- int s;
-
- s = spltty();
- portb = bus_space_read_1(sc->sc_bst, sc->sc_bsh, CIO_PORTB);
- bus_space_write_1(sc->sc_bst, sc->sc_bsh,
- CIO_PORTB, portb & ~CPI_RESET);
- delay(100);
- portb = bus_space_read_1(sc->sc_bst, sc->sc_bsh, CIO_PORTB);
- bus_space_write_1(sc->sc_bst, sc->sc_bsh,
- CIO_PORTB, portb | CPI_RESET);
-
- splx(s);
-#else
portb = z8536_reg_get(sc->sc_bst, sc->sc_bsh, Z8536_PDRB);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_PDRB, portb & ~CPI_RESET);
delay(100);
portb = z8536_reg_get(sc->sc_bst, sc->sc_bsh, Z8536_PDRB);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_PDRB, portb | CPI_RESET);
-#endif /* DIRECT_PORT_ACCESS */
}
@@ -650,88 +621,245 @@
wakeup((void *)sc);
}
-#ifdef USE_CIO_TIMERS
-/*
- * Z8536 CIO timers 1 + 2 used for timecounter(9) support
- */
static void
-cpi_initclock(struct cpi_softc *sc)
+cpi_tc_initclock(struct cpi_softc *sc)
{
- static struct timecounter cpi_timecounter = {
- .tc_get_timecount = cpi_get_timecount,
- .tc_poll_pps = 0,
- .tc_counter_mask = 0x0ffffu,
- .tc_frequency = CLK_FREQ,
- .tc_name = "CPI Z8536 CIO",
- .tc_quality = 50,
- .tc_priv = NULL,
- .tc_next = NULL
- };
-
+ uint8_t reg;
+
/*
- * Set up timers A and B as a single, free-running 32 bit counter
+ * Set up c/t 1 and 2 as a single, free-running 32 bit counter
*/
- /* Disable counters A and B */
+ /* Disable counters 1 and 2 */
reg = z8536_reg_get(sc->sc_bst, sc->sc_bsh, Z8536_MCCR);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_MCCR,
reg & ~(MCCR_CT1E | MCCR_CT2E));
/* Make sure interrupt enable bits are cleared */
- z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTCSR1,
- CTCS_CLR_IE);
- z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTCSR2,
- CTCS_CLR_IE);
+ z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTCSR1, CTCS_CLR_IE);
+ z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTCSR2, CTCS_CLR_IE);
/* Initialise counter start values, and set to continuous cycle */
- z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTMSR1, CTMS_CSC);
+ z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTMSR1,
+ CTMS_CSC | CTMS_DCS_PULSE);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTTCR1_MSB, 0x00);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTTCR1_LSB, 0x00);
- z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTMSR2, CTMS_CSC);
+ z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTMSR2,
+ CTMS_CSC | CTMS_DCS_PULSE);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTTCR2_MSB, 0x00);
z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_CTTCR2_LSB, 0x00);
- /* Re-enable counters A and B */
+ /* Link counters 1 and 2 */
+ reg = z8536_reg_get(sc->sc_bst, sc->sc_bsh, Z8536_MCCR);
+ z8536_reg_set(sc->sc_bst, sc->sc_bsh, Z8536_MCCR, reg | MCCR_CT1CT2);
+
+ /* Enable and counter pair */
reg = z8536_reg_get(sc->sc_bst, sc->sc_bsh, Z8536_MCCR);
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