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[src/trunk]: src/sys/dev/pci The Genesis interface provides a register in the...
details: https://anonhg.NetBSD.org/src/rev/9acf624f35a0
branches: trunk
changeset: 765524:9acf624f35a0
user: phx <phx%NetBSD.org@localhost>
date: Sun May 29 13:31:30 2011 +0000
description:
The Genesis interface provides a register in the device specific config space
to automatically revert the byte order in all descriptors.
Make sure this feature is inactive. Otherwise the driver is unable to
receive or transmit any frame.
diffstat:
sys/dev/pci/if_sk.c | 13 +++++++++++--
sys/dev/pci/if_skreg.h | 5 ++++-
2 files changed, 15 insertions(+), 3 deletions(-)
diffs (53 lines):
diff -r 1060208d6d90 -r 9acf624f35a0 sys/dev/pci/if_sk.c
--- a/sys/dev/pci/if_sk.c Sun May 29 12:57:14 2011 +0000
+++ b/sys/dev/pci/if_sk.c Sun May 29 13:31:30 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_sk.c,v 1.68 2010/07/26 22:33:24 jym Exp $ */
+/* $NetBSD: if_sk.c,v 1.69 2011/05/29 13:31:30 phx Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@@ -115,7 +115,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_sk.c,v 1.68 2010/07/26 22:33:24 jym Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_sk.c,v 1.69 2011/05/29 13:31:30 phx Exp $");
#include "rnd.h"
@@ -1556,6 +1556,15 @@
}
/*
+ * The firmware might have configured the interface to revert the
+ * byte order in all descriptors. Make that undone.
+ */
+ command = pci_conf_read(pc, pa->pa_tag, SK_PCI_OURREG2);
+ if (command & SK_REG2_REV_DESC)
+ pci_conf_write(pc, pa->pa_tag, SK_PCI_OURREG2,
+ command & ~SK_REG2_REV_DESC);
+
+ /*
* Map control/status registers.
*/
command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
diff -r 1060208d6d90 -r 9acf624f35a0 sys/dev/pci/if_skreg.h
--- a/sys/dev/pci/if_skreg.h Sun May 29 12:57:14 2011 +0000
+++ b/sys/dev/pci/if_skreg.h Sun May 29 13:31:30 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_skreg.h,v 1.13 2008/11/18 09:30:43 chris Exp $ */
+/* $NetBSD: if_skreg.h,v 1.14 2011/05/29 13:31:30 phx Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@@ -1513,6 +1513,9 @@
#define SK_Y2_REG1_PHY1_COMA 0x10000000
#define SK_Y2_REG1_PHY2_COMA 0x20000000
+/* SK_PCI_OURREG2 32bits */
+#define SK_REG2_REV_DESC 0x00000004 /* revert byte order in descriptor */
+
/* SK_PCI_OURREG4 32bits (Yukon-ECU only) */
#define SK_Y2_REG4_TIMER_VALUE_MSK (0xff << 16)
#define SK_Y2_REG4_FORCE_ASPM_REQUEST __BIT(15)
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