[src/trunk]: src/sys/arch/arm Support cpu_sleep() on Sheeva CPUs.

[hans <hans%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e5540d3cfe92
branches:  trunk
changeset: 780180:e5540d3cfe92
user:      hans <hans%NetBSD.org@localhost>
date:      Sat Jul 14 12:59:55 2012 +0000

description:
Support cpu_sleep() on Sheeva CPUs.

diffstat:

 sys/arch/arm/arm/cpufunc.c            |  7 ++++---
 sys/arch/arm/arm/cpufunc_asm_sheeva.S |  8 ++++++++
 sys/arch/arm/include/cpufunc.h        |  1 +
 3 files changed, 13 insertions(+), 3 deletions(-)

diffs (61 lines):

diff -r 8c23e86eac43 -r e5540d3cfe92 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Sat Jul 14 10:24:59 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Sat Jul 14 12:59:55 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $       */
+/*     $NetBSD: cpufunc.c,v 1.107 2012/07/14 12:59:55 hans Exp $       */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.107 2012/07/14 12:59:55 hans Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1243,7 +1243,7 @@
        .cf_flush_brnchtgt_C    = cpufunc_nullop,
        .cf_flush_brnchtgt_E    = (void *)cpufunc_nullop,
 
-       .cf_sleep               = (void *)cpufunc_nullop,
+       .cf_sleep               = (void *)sheeva_cpu_sleep,
 
        /* Soft functions */
 
@@ -1598,6 +1598,7 @@
                cpu_reset_needs_v4_MMU_disable = 1;     /* V4 or higher */
                get_cachetype_cp15();
                pmap_pte_init_generic();
+               cpu_do_powersave = 1;                   /* Enable powersave */
                return 0;
        }
 #endif /* CPU_SHEEVA */
diff -r 8c23e86eac43 -r e5540d3cfe92 sys/arch/arm/arm/cpufunc_asm_sheeva.S
--- a/sys/arch/arm/arm/cpufunc_asm_sheeva.S     Sat Jul 14 10:24:59 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_sheeva.S     Sat Jul 14 12:59:55 2012 +0000
@@ -214,3 +214,11 @@
        mcr     p15, 0, r0, c7, c10, 4  /* drain the write buffer */
        ldr     lr, [sp], #4
        RET
+
+/*
+ * CPU sleep
+ */
+ENTRY_NP(sheeva_cpu_sleep)
+       mov     r0, #0
+       mcr     p15, 0, r0, c7, c0, 4   /* wait for interrupt */
+       RET
diff -r 8c23e86eac43 -r e5540d3cfe92 sys/arch/arm/include/cpufunc.h
--- a/sys/arch/arm/include/cpufunc.h    Sat Jul 14 10:24:59 2012 +0000
+++ b/sys/arch/arm/include/cpufunc.h    Sat Jul 14 12:59:55 2012 +0000
@@ -554,6 +554,7 @@
 void   sheeva_dcache_wb_range  (vaddr_t, vsize_t);
 void   sheeva_idcache_wbinv_range (vaddr_t, vsize_t);
 void   sheeva_setup(char *);
+void   sheeva_cpu_sleep(int);
 #endif
 
 #define tlb_flush      cpu_tlb_flushID