[src/trunk]: src/sys/arch/i386/include The FPU Tag word is a 16bit register, ...

[mlelstv <mlelstv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/a333edeb55ec
branches:  trunk
changeset: 747631:a333edeb55ec
user:      mlelstv <mlelstv%NetBSD.org@localhost>
date:      Fri Sep 25 13:51:27 2009 +0000

description:
The FPU Tag word is a 16bit register, in FPU (387) mode it
defines 2-bit tags for each FPU data register, in MMX mode it
defines 1-bit tags for each data register. The single bit
tags are stored in the lower 8 bits and thus in the first byte
of the save frame.

See amd64/include/fpu.h and the IA-32 Software Developer's manual Vol 2A.

diffstat:

 sys/arch/i386/include/npx.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (19 lines):

diff -r 47901c306095 -r a333edeb55ec sys/arch/i386/include/npx.h
--- a/sys/arch/i386/include/npx.h       Fri Sep 25 11:58:08 2009 +0000
+++ b/sys/arch/i386/include/npx.h       Fri Sep 25 13:51:27 2009 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: npx.h,v 1.22 2006/05/02 19:03:24 drochner Exp $        */
+/*     $NetBSD: npx.h,v 1.23 2009/09/25 13:51:27 mlelstv Exp $ */
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -81,8 +81,8 @@
 struct envxmm {
 /*0*/  uint16_t en_cw;         /* FPU Control Word */
        uint16_t en_sw;         /* FPU Status Word */
+       uint8_t  en_tw;         /* FPU Tag Word (abridged) */
        uint8_t  en_rsvd0;
-       uint8_t  en_tw;         /* FPU Tag Word (abridged) */
        uint16_t en_opcode;     /* FPU Opcode */
        uint32_t en_fip;        /* FPU Instruction Pointer */
        uint16_t en_fcs;        /* FPU IP selector */